scholarly journals Layout-Accurate Design and Implementation of a High-Throughput Interconnection Network for Single-Chip Parallel Processing

2007 ◽  
Author(s):  
Aydin O. Balkan ◽  
Michael N. Horak ◽  
Gang Qu ◽  
Uzi Vishkin
Keyword(s):  
Parallel Processing ◽  
High Throughput ◽  
Interconnection Network ◽  
Single Chip ◽  
Design And Implementation ◽  
Accurate Design

The Design and Implementation of a Handling-Robot

2014 ◽  
Vol 644-650 ◽  
pp. 290-293
Author(s):  
Zhi Hui Deng ◽  
Yun Hang Zhu
Keyword(s):  
Production Efficiency ◽  
Structure Design ◽  
Stepper Motor ◽  
Current Sensor ◽  
Single Chip ◽  
Single Chip Microcomputer ◽  
Accident Rate ◽  
Repetitive Work ◽  
Design And Implementation ◽  
Information Interaction

A robot based on STC12C5A60S2 single-chip-microcomputer is designed for improving the production efficiency and reducing repetitive work. The system could identify path by detecting metal using eddy current sensor. By ways of the single-chip-microcomputer controlling stepper motor, the robot can run according to the predetermined route, judge independently cargo range and deliver the goods to the designated location. The implementation methods of the important links, such as mechanical structure design, path recognition and steering engine driving and so on are introduced, the system of which make the information interaction with computer through ISP-module (In-system-programming).by testing the model, it shows that the system can meet the design goals of handling goods automatically, and it has higher application value of reducing the accident rate of worker in repeated works and improving labor productivity.

scholarly journals Design and Implementation of Rearrangable Non-Blocking Switching Network in VLSI

2019 ◽  
Vol 8 (2S11) ◽  
pp. 2858-2863
Keyword(s):  
Interconnection Network ◽  
The Other ◽  
Switching Network ◽  
Low Latency ◽  
Multistage Interconnection Network ◽  
Design And Implementation ◽  
Benes Network ◽  
Benes Networks

The main goal of this article is to implement an effective Non-Blocking Benes switching Network. Benes Switching Network is designed with the uncomplicated switch modules & it’s have so many advantages, small latency, less traffic and it’s required number of switch modules. Clos and Benes networks are play a key role in the class of multistage interconnection network because of their extensibility and mortality. Benes network provides a low latency when compare with the other networks. 8x8 Benes non blocking switching network is designed and synthesized with the using of Xilinx tool 12.1.

Design and Implementation of the PTZ Control System Based on MSP430 Single Chip Micyoco (SCM)

2013 ◽  
Vol 443 ◽  
pp. 318-321
Author(s):  
Zhai Hong
Keyword(s):  
Control System ◽  
Environmental Factors ◽  
Automatic Control ◽  
Automatic Control System ◽  
Environmental Control ◽  
Control Factor ◽  
Single Chip ◽  
Single Chip Microcomputer ◽  
Overall Design ◽  
Design And Implementation

This paper elaborates the control of environmental factors in the modern industry and agriculture, and according to the problem that the temperature and the humidity is hard to control automatically, this paper puts forward the design of the greenhouse automatic control system based on MSP430 single chip microcomputer. This design mainly introduces the overall design scheme of the automatic control system, and the use of the properties of various hardware based on MPS430, which mainly include temperature transmission sensor DS18B20 and the humidity transmission sensor CHR01. And then use the environmental control factor algorithm and numerical conversion fuzzy algorithm, so as to realize the temperature and humidity control system.

Petersen-star networks modeled by optical transpose interconnection system

2021 ◽  
Vol 17 (11) ◽  
pp. 155014772110331
Author(s):  
Jung-hyun Seo ◽  
HyeongOk Lee
Keyword(s):  
Parallel Processing ◽  
Optical Communication ◽  
Time Complexity ◽  
High Performance ◽  
Electronic Communication ◽  
Interconnection Network ◽  
Processing System ◽  
Factor Graph ◽  
Star Network ◽  
Network Cost

One method to create a high-performance computer is to use parallel processing to connect multiple computers. The structure of the parallel processing system is represented as an interconnection network. Traditionally, the communication links that connect the nodes in the interconnection network use electricity. With the advent of optical communication, however, optical transpose interconnection system networks have emerged, which combine the advantages of electronic communication and optical communication. Optical transpose interconnection system networks use electronic communication for relatively short distances and optical communication for long distances. Regardless of whether the interconnection network uses electronic communication or optical communication, network cost is an important factor among the various measures used for the evaluation of networks. In this article, we first propose a novel optical transpose interconnection system–Petersen-star network with a small network cost and analyze its basic topological properties. Optical transpose interconnection system–Petersen-star network is an undirected graph where the factor graph is Petersen-star network. OTIS–PSN n has the number of nodes 102n, degree n+3, and diameter 6 n − 1. Second, we compare the network cost between optical transpose interconnection system–Petersen-star network and other optical transpose interconnection system networks. Finally, we propose a routing algorithm with a time complexity of 6 n − 1 and a one-to-all broadcasting algorithm with a time complexity of 2 n − 1.

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