Towards integrated circuit thermal profiling for reduced power consumption: Evaluation of distributed sensing techniques

Author(s):  
Andres Kwasinski ◽  
Dhireesha Kudithipudi
Author(s):  
Soyoun Park ◽  
Hyungmin Kim ◽  
Daniel Juhun Lee ◽  
Taemin Nho ◽  
Seongkweon Kim ◽  
...  

2011 ◽  
Vol 21 (3) ◽  
pp. 770-775 ◽  
Author(s):  
T Ortlepp ◽  
O Wetzstein ◽  
S Engert ◽  
J Kunert ◽  
H Toepfer

2004 ◽  
Vol 34 (3) ◽  
pp. 206-208
Author(s):  
D S Mamedov ◽  
Aleksandr A Marmalyuk ◽  
D B Nikitin ◽  
S D Yakubovich ◽  
Vyacheslav V Prokhorov

2009 ◽  
Vol 1 (1) ◽  
pp. 690-693 ◽  
Author(s):  
S.L. Paalvast ◽  
H.T.M. Pham ◽  
P.M. Sarrob ◽  
R.H. Munnig Schmidt

Arithmetic Logic Unit (ALU) is the main component in the processors. Most important design consideration in integrated circuit is power. In all the components of ALU data path is the active one and it consumes more percent of power in the total power. In the modern microprocessors it is important to have power efficient data paths. To reduce the power consumption in microprocessors the ALU is designed using PNS-FCR static CMOS logic. In this paper static CMOS logic is used to reduce power consumption. Static technique does not need any clock. So it leads to less power consumption. For the implementation of the ALU with the PNS-FCR static logic mentor graphics tool is used. The power consumption of ALU is compared with and without using FCR. An 8-bit ALU is designed in mentor graphics with 130nm technology. The proposed design methodology gives less power consumption


Author(s):  
Nicola Donato ◽  
Thorsten Wagner ◽  
Michael Tiemann ◽  
Thomas Waitz ◽  
Claus-Dieter Kohl ◽  
...  

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