A 0.28-0.8V 320 fW D-latch for sub-VT memories in 65 nm CMOS

2014 IEEE Faible Tension Faible Consommation ◽

10.1109/ftfc.2014.6828618 ◽

2014 ◽

Author(s):

Babak Mohammadi ◽

Oskar Andersson ◽

Pascal Meinerzhagen ◽

Yasser Sherazi ◽

Andreas Burg ◽

...

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