Integrating the Electronics of the Control-Loops of the JPL/Boeing Gyroscope Within an Evolvable Hardware Architecture

2006 ◽  
Author(s):  
Evangelos F. Stefatos ◽  
Tughrul Arslan ◽  
Didier Keymeulen ◽  
Ian Ferguson
Keyword(s):  
Hardware Architecture ◽  
Evolvable Hardware ◽  
Control Loops

There Reduction of alkali loss in an ash leaching system

TAPPI Journal ◽  
2017 ◽  
Vol 16 (7) ◽  
pp. 383-391
Author(s):  
CARLA CÉLIA ROSA MEDEIROS ◽  
FLÁVIA AZEVEDO SILVA ◽  
SAULO GODOY PIGNATON ◽  
ESTANISLAU VICTOR ZUTAUTAS ◽  
KLEVERSON FIGUEIREDO
Keyword(s):  
Solid Waste ◽  
Air Emissions ◽  
Recovery Cycle ◽  
Chloride Level ◽  
Control Loops ◽  
Kraft Mill ◽  
Recovery Boiler ◽  
Ash Leaching

There are many points in a kraft mill where the alkaline compounds are purged from the process. Several effluents, solid waste, and air emissions contain alkali, which leads to the necessity of chemical makeups to maintain the liquor balance. The main loss of alkali at the Veracel mill is present in the wastewater from the recovery boiler; more precisely, it is from the ash leaching system, which represents 80% of the total losses. To minimize the alkaline losses while keeping the chloride level in the recovery cycle under control, a project was developed at Veracel. Key actions were taken by adjusting the control loops of the ash leaching system, mainly on the slurry density and purge control. These adjustments led to a decrease in alkali losses and to an increase of treated ash, and kept the chloride level of the recovery boiler dust at 2.6%.

A New Hardware Architecture for Fuzzy Logic System Acceleration

2016 ◽  
Vol 12 (2) ◽  
pp. 188-197
Author(s):  
A yahoo.com ◽  
Aumalhuda Gani Abood aumalhuda ◽  
A comp ◽  
Dr. Mohammed A. Jodha ◽  
Dr. Majid A. Alwan
Keyword(s):  
Fuzzy Logic ◽  
Fuzzy Logic System ◽  
Hardware Architecture ◽  
Logic System

Using advanced control, post-denitrification and equalisation to improve the performance of a submerged filter

2000 ◽  
Vol 41 (4-5) ◽  
pp. 177-184 ◽  
Author(s):  
K.H. Sørensen ◽  
D. Thornberg ◽  
K.F. Janning
Keyword(s):  
Energy Consumption ◽  
Total N ◽  
Control Loops ◽  
Effluent Quality ◽  
Advanced Control ◽  
Before And After ◽  
And Control ◽  
Side Flow ◽  
Configuration Control ◽  
Control Post

In 1998, the capacity of the BIOSTYR® submerged biofilter at Nyborg WWTP was extended from 48,000 PE to 60,000 PE including advanced sensor based control, post-denitrification in BIOSTYR® and equalization of side flows. The existing configuration with 8 BIOSTYR® DN/N cells is based on pre-denitrification and an internal recirculation of 600–800%. The extended plant comprises 7 BIOSTYR® DN/N cells with 50–225% recirculation followed by 3 BIOSTYR DN cells for post-denitrification. The advanced control loops include blower control, control of the number of active cells (stand-by), automatic switch to high load configuration, control of the side flow equalization, control of the internal recirculation and control of the external carbon source dosing. In this paper, the achieved improvements are documented by comparing influent and effluent data, methanol and energy consumption from comparable periods before and after the extension. Although the nitrogen load to the plant was increased by 20% after the extension, the effluent quality has improved significantly with a reduction of Total-N from 7–8 mg/l to 3–4 mg/l. Simultaneously, the methanol consumption has been reduced by more than 50% per kg removed nitrogen. The energy consumption remained constant although the nitrogen load was increased by 20% and the inflow by 80%.

4D-DCT Hardware Architecture for JPEG Pleno Light Field Coding

2020 ◽  
Author(s):  
Matheus Jahnke ◽  
Jones Goebel ◽  
Daniel Palomino ◽  
Guilherme Correa ◽  
Luciano Agostini ◽  
...  
Keyword(s):  
Light Field ◽  
Hardware Architecture

scholarly journals Real-time FPGA-based implementation of the AKAZE algorithm with nonlinear scale space generation using image partitioning

2021 ◽  
Author(s):  
Parastoo Soleimani ◽  
David W. Capson ◽  
Kin Fun Li
Keyword(s):  
Real Time ◽  
Memory Management ◽  
Scale Space ◽  
Image Resolution ◽  
Hardware Architecture ◽  
Frame Rate ◽  
Time Sharing ◽  
Scale Invariant ◽  
Nonlinear Scale Space ◽  
Nonlinear Scale

AbstractThe first step in a scale invariant image matching system is scale space generation. Nonlinear scale space generation algorithms such as AKAZE, reduce noise and distortion in different scales while retaining the borders and key-points of the image. An FPGA-based hardware architecture for AKAZE nonlinear scale space generation is proposed to speed up this algorithm for real-time applications. The three contributions of this work are (1) mapping the two passes of the AKAZE algorithm onto a hardware architecture that realizes parallel processing of multiple sections, (2) multi-scale line buffers which can be used for different scales, and (3) a time-sharing mechanism in the memory management unit to process multiple sections of the image in parallel. We propose a time-sharing mechanism for memory management to prevent artifacts as a result of separating the process of image partitioning. We also use approximations in the algorithm to make hardware implementation more efficient while maintaining the repeatability of the detection. A frame rate of 304 frames per second for a $$1280 \times 768$$ 1280 × 768 image resolution is achieved which is favorably faster in comparison with other work.

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