Performance Analysis of H.265/HEVC (High-Efficiency Video Coding) with Reference to Other Codecs

2015 ◽  
Author(s):  
N. Minallah ◽  
S. Gul ◽  
M.M. Bokhari
Keyword(s):  
Performance Analysis ◽  
Video Coding ◽  
High Efficiency ◽  
High Efficiency Video Coding

scholarly journals Extended cross-component prediction in HEVC

2017 ◽  
Vol 6 ◽  
Author(s):  
Mischa Siekmann ◽  
Ali Khairat ◽  
Tung Nguyen ◽  
Detlev Marpe ◽  
Thomas Wiegand
Keyword(s):  
Performance Analysis ◽  
Video Coding ◽  
High Efficiency ◽  
Experimental Results ◽  
High Efficiency Video Coding ◽  
Compression Efficiency ◽  
Model Parameter ◽  
Different Color ◽  
Color Components ◽  
A Performance

With Version 2 of the high-efficiency video coding standard, a new compression efficiency tool targeting redundancies among color components is specified for all 4:4:4 profiles, and referred to as cross-component prediction (CCP). This paper describes and analyses two additional extensions to the specified CCP variant. In the first extension, an additional predictor is introduced. Particularly, beside the luma component, also the first chroma component can serve as a reference for prediction of the second chroma component. The second extension proposes a method for predicting the CCP model parameter from the statistics of already reconstructed neighboring blocks. A performance analysis of coding RGB content in different color representations is given in comparison with CCP and both extensions. Experimental results show that the proposed extensions can improve the compression efficiency effectively compared with CCP, when applied in the YCbCr domain.

High-Performance Hardware Interpolation Architecture for High Efficiency Video Coding Decoder

2016 ◽  
Vol 11 (9) ◽  
pp. 764
Author(s):  
Lella Aicha Ayadi ◽  
Nihel Neji ◽  
Hassen Loukil ◽  
Mouhamed Ali Ben Ayed ◽  
Nouri Masmoudi
Keyword(s):  
Video Coding ◽  
High Performance ◽  
High Efficiency ◽  
High Efficiency Video Coding

scholarly journals A low-area high-efficiency video coding inverse transform core using resource and time sharing architecture

2020 ◽  
Vol 2020 (1) ◽  
Author(s):  
Yuan-Ho Chen ◽  
Chieh-Yang Liu
Keyword(s):  
Video Coding ◽  
Large Scale ◽  
High Efficiency ◽  
Vlsi Design ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Time Sharing ◽  
High Efficiency Video Coding ◽  
Low Area ◽  
Matrix Products

AbstractIn this paper, a very-large-scale integration (VLSI) design that can support high-efficiency video coding inverse discrete cosine transform (IDCT) for multiple transform sizes is proposed. The proposed two-dimensional (2-D) IDCT is implemented at a low area by using a single one-dimensional (1-D) IDCT core with a transpose memory. The proposed 1-D IDCT core decomposes a 32-point transform into 16-, 8-, and 4-point matrix products according to the symmetric property of the transform coefficient. Moreover, we use the shift-and-add unit to share hardware resources between multiple transform dimension matrix products. The 1-D IDCT core can simultaneously calculate the first- and second-dimensional data. The results indicate that the proposed 2-D IDCT core has a throughput rate of 250 MP/s, with only 110 K gate counts when implemented into the Taiwan semiconductor manufacturing (TSMC) 90-nm complementary metal-oxide-semiconductor (CMOS) technology. The results show the proposed circuit has the smallest area supporting the multiple transform sizes.

Co‐design implementation of High Efficiency Video Coding standard encoder on Zynq MPSoC

2021 ◽  
Vol 49 (4) ◽  
pp. 1013-1027
Author(s):  
Hajar Touzani ◽  
Anass Mansouri ◽  
Fatima Errahimi ◽  
Ali Ahaitouf
Keyword(s):  
Video Coding ◽  
High Efficiency ◽  
High Efficiency Video Coding
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