An Approach to a Fully Automated Partial Reconfiguration Design Flow

2013 ◽  
Author(s):  
Kizheppatt Vipin ◽  
Suhaib A. Fahmy
Keyword(s):  
Design Flow ◽  
Partial Reconfiguration

Dynamic Reconfiguration for Internal Monitoring Services

2016 ◽  
pp. 124-136
Author(s):  
Julio Daniel Dondo Gazzano ◽  
Fernando Rincon Calle ◽  
Julian Caba ◽  
David de la Fuente ◽  
Jesus Barba Romero
Keyword(s):  
Quality Assurance ◽  
Monitoring System ◽  
Hardware Design ◽  
Dynamic Reconfiguration ◽  
Design Flow ◽  
Added Value ◽  
Partial Reconfiguration ◽  
Dynamically Reconfigurable ◽  
Simulation Process ◽  
Hardware Component

In hardware design flow, testing is the most important step to hardware quality assurance before a hardware component is released. However simulation and verification during design steps are not enough to guarantee a system without failures. In many cases the system fails after have been deployed. Dynamically reconfigurable FPGAs have the ability to reconfigure part of its architecture during run time without stopping the whole system. This feature is an added value that can be exploited for internal system monitoring and verification. Using partial reconfiguration, an Internal Monitoring System can be implemented in reconfigurable areas for monitoring different conditions and signals in the circuit, after implementation. This allows detecting and identifying those failures that were not possible to detect during simulation process.

A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs

2018 ◽  
Vol 83 ◽  
pp. 50-63 ◽  
Author(s):  
Victor Manuel Gonçalves Martins ◽  
Paulo Ricardo Cechelero Villa ◽  
Rodrigo Travessini ◽  
Marcelo Daniel Berejuck ◽  
Eduardo Augusto Bezerra
Keyword(s):  
Design Flow ◽  
Partial Reconfiguration ◽  
Dynamic Partial Reconfiguration ◽  
Permanent Faults

High-level design flow and environment for FPGA-based dynamic partial reconfiguration

2017 ◽  
Vol 104 (8) ◽  
pp. 1254-1284
Author(s):  
Abdessalem Ben Abdelali ◽  
Marwa Hannachi ◽  
Mohamed Nidhal Krifa ◽  
Hassan Rabah ◽  
Abdellatif Mtibaa
Keyword(s):  
Design Flow ◽  
Partial Reconfiguration ◽  
Dynamic Partial Reconfiguration ◽  
Level Design ◽  
High Level

A Hardware/Software Co-Design Flow for Dynamic Partial Reconfiguration

2012 ◽  
Vol 433-440 ◽  
pp. 5172-5177
Author(s):  
Xiao Jing Feng ◽  
Xi Li ◽  
Wang Chao ◽  
Xue Hai Zhou ◽  
Jun Neng Zhang
Keyword(s):  
Embedded Systems ◽  
Hardware Design ◽  
Design Flow ◽  
Experimental Results ◽  
Prototype System ◽  
Partial Reconfiguration ◽  
Dynamic Partial Reconfiguration ◽  
Software And Hardware ◽  
Reconfiguration Overhead ◽  
Hardware Designs

The strict requirements on both performance and flexibility lead us to apply Dynamic Partial Reconfiguration (DPR) technology in embedded systems. However, existing DPR design flows are still immature, since previous works mainly focus on hardware designs while ignore software designs for DPR. To remedy this weakness, this paper proposes a hardware/software (HW/SW) co-design flow for DPR. The co-design flow aims at accelerating the process of DPR designs, and it merges software and hardware design flows to make them operate in parallel. Besides, in order to validate the effectiveness of our co-design flow, we implement a partial self-reconfigurable prototype system on Xilinx Virtex-5 platform and perform a set of experiments. Experimental results present that the reconfiguration overhead for partial reconfiguration is only 4.66% against global reconfiguration in our prototype. It’s also presented that our prototype can achieve a 23.6 × speedup over software algorithm solutions.

A Collaborative Approach to Upgrading to Limits of Technology at the York River Treatment Plant

2009 ◽  
Vol 4 (3) ◽  
Author(s):  
I. Venner ◽  
J. Husband ◽  
J. Noonan ◽  
A. Nelson ◽  
D. Waltrip
Keyword(s):  
Chesapeake Bay ◽  
Phase 1 ◽  
Treatment Plant ◽  
Cost Effective ◽  
Design Flow ◽  
Nutrient Reduction ◽  
York River ◽  
Hampton Roads ◽  
Key Issues ◽  
Virginia Department

In response to rapid population growth as well as to address the nutrient reduction goals for the Chesapeake Bay established by the Virginia Department of Environmental Quality (VDEQ), the Hampton Roads Sanitation District (HRSD) initiated the York River Treatment Plant (YRTP) Expansion Phase 1 project. The existing YRTP is a conventional step-feed activated sludge plant and is rated for an average daily design flow of 57 million liters per day (MLD). This project proposes to expand the existing treatment capacity to 114 MLD and to reduce the nutrients discharged to the York River, a tributary for the Chesapeake Bay. In order to meet the effluent limits set by the VDEQ, a treatment upgrade to limit of technology (LOT) or enhanced nutrient removal (ENR) was required. Malcolm Pirnie worked with HRSD and the VDEQ to develop and evaluate ENR process alternatives to achieve the required effluent limits with the goal of determining the most reliable and cost effective alternative to achieve the aggressive nutrient reduction goals. This paper will highlight the key issues in determining the most desirable treatment process considering both economic and non-economic factors.

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