Real-time processing of fast-scan cyclic voltammetry (FSCV) data using a field-programmable gate array (FPGA)

2014 ◽  
Author(s):  
Bardia Bozorgzadeh ◽  
Daniel P. Covey ◽  
Byron A. Heidenreich ◽  
Paul A. Garris ◽  
Pedram Mohseni
Keyword(s):  
Cyclic Voltammetry ◽  
Real Time ◽  
Field Programmable Gate Array ◽  
Fast Scan Cyclic Voltammetry ◽  
Real Time Processing ◽  
Time Processing ◽  
Field Programmable ◽  
Gate Array

A Real-Time Processing System Based on Field Programmable Gate Array for Infrared Image

2009 ◽  
Vol 36 (2) ◽  
pp. 307-311
Author(s):  
罗凤武 Luo Fengwu ◽  
王利颖 Wang Liying ◽  
涂霞 Tu Xia ◽  
陈厚来 Chen Houlai
Keyword(s):  
Real Time ◽  
Field Programmable Gate Array ◽  
Infrared Image ◽  
Processing System ◽  
Real Time Processing ◽  
Time Processing ◽  
Field Programmable ◽  
Gate Array

Real-time signal processing in field programmable gate array based digital gamma-ray spectrometer

2020 ◽  
Vol 91 (10) ◽  
pp. 104707
Author(s):  
Yinyu Liu ◽  
Hao Xiong ◽  
Chunhui Dong ◽  
Chaoyang Zhao ◽  
Quanfeng Zhou ◽  
...  
Keyword(s):  
Signal Processing ◽  
Real Time ◽  
Field Programmable Gate Array ◽  
Gamma Ray ◽  
Time Signal ◽  
Gamma Ray Spectrometer ◽  
Field Programmable ◽  
Gate Array ◽  
Real Time Signal Processing

scholarly journals Time Resolution Improvement Using Dual Delay Lines for Field-Programmable-Gate-Array-Based Time-to-Digital Converters with Real-Time Calibration

2018 ◽  
Vol 9 (1) ◽  
pp. 20 ◽  
Author(s):  
Yuan-Ho Chen
Keyword(s):  
Real Time ◽  
Field Programmable Gate Array ◽  
Delay Lines ◽  
Differential Nonlinearity ◽  
Time Calibration ◽  
Integral Nonlinearity ◽  
Resolution Improvement ◽  
Field Programmable ◽  
Gate Array ◽  
Set Up

This paper presents a time-to-digital converter (TDC) based on a field programmable gate array (FPGA) with a tapped delay line (TDL) architecture. This converter employs dual delay lines (DDLs) to enable real-time calibrations, and the proposed DDL-TDC measures the statistical distribution of delays to permit the calibration of nonuniform delay cells in FPGA-based TDC designs. DDLs are also used to set up alternate calibrations, thus enabling environmental effects to be immediately accounted for. Experimental results revealed that relative to a conventional TDL-TDC, the proposed DDL-TDC reduced the maximum differential nonlinearity by 26% and the integral nonlinearity by 30%. A root-mean-squared value of 32 ps was measured by inputting the constant delay source into the proposed DDL-TDC. The proposed scheme also maintained excellent linearity across a range of temperatures.

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