A Digital Background Calibration Algorithm of Pipelined ADC Based on Pesudo-Random Sequence

2019 IEEE 2nd International Conference on Electronics Technology (ICET) ◽

10.1109/eltech.2019.8839343 ◽

2019 ◽

Author(s):

Tangzheng Wu ◽

Na Wang ◽

Jie Wang ◽

Liang Xie ◽

Xiangliang Jin

Keyword(s):

Random Sequence ◽

Pipelined Adc ◽

Background Calibration ◽

Digital Background Calibration ◽

Calibration Algorithm

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Digital Background Calibration for a 14-bit 100-MS/s Pipelined ADC Using Signal-Dependent Dithering

IEICE Transactions on Electronics ◽

10.1587/transele.e97.c.207 ◽

2014 ◽

Vol E97.C (3) ◽

pp. 207-214

Author(s):

Zhao-xin XIONG ◽

Min CAI ◽

Xiao-Yong HE ◽

Yun YANG

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Digital Background Calibration

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Background calibration algorithm for pipelined ADC with open-loop residue amplifier using split ADC structure

2010 IEEE Asia Pacific Conference on Circuits and Systems ◽

10.1109/apccas.2010.5774756 ◽

2010 ◽

Cited By ~ 6

Author(s):

Takuya Yagi ◽

Kunihiko Usui ◽

Tatsuji Matsuura ◽

Satoshi Uemori ◽

Yohei Tan ◽

...

Keyword(s):

Open Loop ◽

Pipelined Adc ◽

Background Calibration ◽

Calibration Algorithm ◽

Loop Residue

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12 bit 3.072 GS/s 32‐way time‐interleaved pipelined ADC with digital background calibration for wideband fully digital receiver application in 65 nm complementary metal–oxide–semiconductor

IET Circuits Devices & Systems ◽

10.1049/iet-cds.2019.0069 ◽

2020 ◽

Vol 14 (2) ◽

pp. 182-191

Author(s):

Waleed Hussain Siddiqui ◽

Goang Seong Choi

Keyword(s):

Metal Oxide ◽

Complementary Metal Oxide Semiconductor ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Pipelined Adc ◽

Digital Receiver ◽

Background Calibration ◽

Digital Background Calibration ◽

Time Interleaved

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A digital background calibration algorithm of a pipeline ADC based on output code calculation

Journal of Semiconductors ◽

10.1088/1674-4926/33/11/115010 ◽

2012 ◽

Vol 33 (11) ◽

pp. 115010

Author(s):

Jianjian Shao ◽

Weitao Li ◽

Cao Sun ◽

Fule Li ◽

Chun Zhang ◽

...

Keyword(s):

Background Calibration ◽

Pipeline Adc ◽

Digital Background Calibration ◽

Output Code ◽

Calibration Algorithm

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An adaptive digital background calibration technique using variable step size LMS for pipelined ADC

2014 9th International Symposium on Communication Systems, Networks & Digital Sign (CSNDSP) ◽

10.1109/csndsp.2014.6923943 ◽

2014 ◽

Author(s):

Nahla T. Abou-El-Kheir ◽

Mohmed Abbas ◽

Mohamed Essam Khedr

Keyword(s):

Variable Step Size ◽

Pipelined Adc ◽

Background Calibration ◽

Calibration Technique ◽

Step Size ◽

Digital Background Calibration ◽

Variable Step

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A new digital background calibration technique for pipelined ADC

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) ◽

10.1109/iscas.2004.1328117 ◽

2004 ◽

Cited By ~ 1

Author(s):

K. El-Sankary ◽

M. Sawan

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Calibration Technique ◽

Digital Background Calibration

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A fast power efficient equalization-based digital background calibration technique for pipelined ADC

2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES) ◽

10.1109/mixdes.2014.6872166 ◽

2014 ◽

Author(s):

Nahla T. Abou-El-Kheir ◽

Mohammed Essam Khedr ◽

Mohamed Abbas

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Calibration Technique ◽

Power Efficient ◽

Digital Background Calibration ◽

Fast Power

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A 12-bit 20-MS/s pipelined ADC with nested digital background calibration

Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003. ◽

10.1109/cicc.2003.1249429 ◽

2004 ◽

Cited By ~ 26

Author(s):

X. Wang ◽

P.J. Hurst ◽

S.H. Lewis

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Digital Background Calibration

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A 2.9-mW 11-b 20-MS/s pipelined ADC with dual-mode-based digital background calibration

2012 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2012.6341337 ◽

2012 ◽

Cited By ~ 9

Author(s):

Nan Sun ◽

Hae-Seung Lee ◽

Donhee Ham

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Dual Mode ◽

Digital Background Calibration

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Modeling of digital background calibration with signal-dependent dithering for a 14-bit, 100-MS/s pipelined ADC

2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia) ◽

10.1109/primeasia.2010.5604947 ◽

2010 ◽

Author(s):

Kexu Sun ◽

Xuan Wang ◽

Lenian He

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Digital Background Calibration

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