System level signal and power integrity analysis for 3200Mbps DDR4 interface

2013 ◽  
Author(s):  
June Feng ◽  
Bipin Dhavale ◽  
Janani Chandrasekhar ◽  
Yuri Tretiakov ◽  
Dan Oh
Keyword(s):  
System Level ◽  
Power Integrity ◽  
Integrity Analysis

scholarly journals Power Integrity Analysis of Low Power SOC Design

2018 ◽  
Vol 466 ◽  
pp. 012060
Author(s):  
Wu Yang ◽  
Xin He ◽  
Jun Deng ◽  
Keliu Hu ◽  
Kun Huang ◽  
...  
Keyword(s):  
Low Power ◽  
Power Integrity ◽  
Integrity Analysis

Signal Integrity Analysis for RF System-in-Package

2011 ◽  
Author(s):  
Jeff Chen ◽  
Weiping Li ◽  
Feng Ling
Keyword(s):  
Design Methodology ◽  
Electromagnetic Compatibility ◽  
Signal Integrity ◽  
Power Integrity ◽  
Rf System ◽  
Noise Coupling ◽  
Design Time ◽  
Close Proximity ◽  
First Pass ◽  
Integrity Analysis

RF System-in-Package (SiP) has become a viable packaging platform, which offers great flexibility to integrate ICs with different processes and different architects. With operating frequency becoming higher and multiple available technologies embedded in one package, the system could fail due to the undesired noise coupling resulted from the close proximity of the components. Therefore, the design methodology with signal integrity (SI), power integrity (PI), and electromagnetic compatibility (EMC) analysis becomes essential to tackle the SiP integration issues. The paper presents a RF SiP design methodology with SI/PI/EMC simulations, which greatly reduces the design time and enables first-pass success.

Signal and power integrity analysis of TSV-Based 3D IC

2011 ◽  
Author(s):  
Jun So Pak ◽  
Heegon Kim ◽  
Jonghyun Cho ◽  
Joohee Kim ◽  
Kiyeong Kim ◽  
...  
Keyword(s):  
Power Integrity ◽  
3D Ic ◽  
Integrity Analysis
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