Soft-error detection using control flow assertions

2004 ◽  
Author(s):  
O. Goloubeva ◽  
M. Rebaudengo ◽  
M. Sonza Reorda ◽  
M. Violante
Keyword(s):  
Error Detection ◽  
Control Flow ◽  
Soft Error

scholarly journals An Investigation into Soft Error Detection Efficiency at Operating System Level

2014 ◽  
Vol 2014 ◽  
pp. 1-8 ◽  
Author(s):  
Seyyed Amir Asghari ◽  
Okyay Kaynak ◽  
Hassan Taheri
Keyword(s):  
Operating System ◽  
Error Detection ◽  
Detection Efficiency ◽  
Soft Errors ◽  
Control Flow ◽  
Soft Error ◽  
System Level ◽  
Occurrence Rate ◽  
Transient Errors ◽  
System Components

Electronic equipment operating in harsh environments such as space is subjected to a range of threats. The most important of these is radiation that gives rise to permanent and transient errors on microelectronic components. The occurrence rate of transient errors is significantly more than permanent errors. The transient errors, or soft errors, emerge in two formats: control flow errors (CFEs) and data errors. Valuable research results have already appeared in literature at hardware and software levels for their alleviation. However, there is the basic assumption behind these works that the operating system is reliable and the focus is on other system levels. In this paper, we investigate the effects of soft errors on the operating system components and compare their vulnerability with that of application level components. Results show that soft errors in operating system components affect both operating system and application level components. Therefore, by providing endurance to operating system level components against soft errors, both operating system and application level components gain tolerance.

AN EFFECTIVE CONTROL FLOW CHECKING METHOD FOR MULTITASK PROCESSING IN HARSH ENVIRONMENTS

2013 ◽  
Vol 22 (08) ◽  
pp. 1350067 ◽  
Author(s):  
SEYYED AMIR ASGHARI ◽  
ATENA ABDI ◽  
OKYAY KAYNAK ◽  
HASSAN TAHERI ◽  
HOSSEIN PEDRAM
Keyword(s):  
Error Detection ◽  
Optimal Solution ◽  
Control Flow ◽  
Simultaneous Optimization ◽  
Harsh Environments ◽  
Effective Control ◽  
Power Performance ◽  
Single Event Upsets ◽  
Novel Method ◽  
And Performance

Electronic equipment used in harsh environments such as space has to cope with many threats. One major threat is the intensive radiation which gives rise to Single Event Upsets (SEU) that lead to control flow errors and data errors. In the design of embedded systems to be used in space, the use of radiation tolerant equipment may therefore be a necessity. However, even if the higher cost of such a choice is not a problem, the efficiency of such equipment is lower than the COTS equipment. Therefore, the use of COTS with appropriate measures to handle the threats may be the optimal solution, in which a simultaneous optimization is carried out for power, performance, reliability and cost. In this paper, a novel method is presented for control flow error detection in multitask environments with less memory and performance overheads as compared to other methods seen in the literature.

scholarly journals Optimized switch-level soft error detection based on advanced switch-level models

2021 ◽  
Author(s):  
Jalal Mohammad Chikhe
Keyword(s):  
Error Detection ◽  
Early Stage ◽  
Soft Errors ◽  
Logic Gate ◽  
Soft Error ◽  
Combinational Circuits ◽  
Single Event Transient ◽  
New Techniques ◽  
Speed Up ◽  
Logic Threshold

Due to the reduction of transistor size, modern circuits are becoming more sensitive to soft errors. The development of new techniques and algorithms targeting soft error detection are important as they allow designers to evaluate the weaknesses of the circuits at an early stage of the design. The project presents an optimized implementation of soft error detection simulator targeting combinational circuits. The developed simulator uses advanced switch level models allowing the injection of soft errors caused by single event-transient pulses with magnitudes lesser than the logic threshold. The ISCAS'85 benchmark circuits are used for the simulations. The transients can be injected at drain, gate, or inputs of logic gate. This gives clear indication of the importance of transient injection location on the fault coverage. Furthermore, an algorithm is designed and implemented in this work to increase the performance of the simulator. This optimized version of the simulator achieved an average speed-up of 310 compared to the non-algorithm based version of the simulator.

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