A Highly Robust Double Node Upset Tolerant latch

2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) ◽

10.1109/dft.2016.7684062 ◽

2016 ◽

Cited By ~ 10

Author(s):

Adam Watkins ◽

Spyros Tragouodas

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