An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits
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2010 ◽
Vol 57
(11)
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pp. 2981-2990
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2013 ◽
Vol 14
(3)
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pp. 639-663
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2003 ◽
Vol 22
(2)
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pp. 155-170
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2007 ◽
Vol 26
(12)
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pp. 2116-2129
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2020 ◽
Vol 11
(2)
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pp. 894-905
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2014 ◽
Vol 33
(7)
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pp. 1100-1104
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2005 ◽
Vol 167
(1)
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pp. 576-591
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