A Hierarchical Gate Array Architecture and Design Methodology

22nd ACM/IEEE Design Automation Conference ◽

10.1109/dac.1985.1585978 ◽

1985 ◽

Cited By ~ 1

Author(s):

M. Iacoponi ◽

D. Vail ◽

S. Bierly ◽

A. Ignatowski

Keyword(s):

Design Methodology ◽

Array Architecture ◽

Gate Array ◽

Architecture And Design

Download Full-text

A hierarchical gate array architecture and design methodology

22nd ACM/IEEE Design Automation Conference ◽

10.1145/317825.317925 ◽

1985 ◽

Cited By ~ 2

Author(s):

M. Iachponi ◽

D. Vail ◽

S. Bierly ◽

A. Ignatowski

Keyword(s):

Design Methodology ◽

Array Architecture ◽

Gate Array ◽

Architecture And Design

Download Full-text

Application-specific coarse-grained reconfigurable array: architecture and design methodology

International Journal of Electronics ◽

10.1080/00207217.2014.942885 ◽

2014 ◽

Vol 102 (6) ◽

pp. 897-910

Author(s):

Li Zhou ◽

Dongpei Liu ◽

Jianfeng Zhang ◽

Hengzhu Liu

Keyword(s):

Design Methodology ◽

Coarse Grained ◽

Array Architecture ◽

Reconfigurable Array ◽

Architecture And Design ◽

Application Specific

Download Full-text

Programmable Optically Reconfigurable Gate Array Architecture using a PAL-SLM

2008 IEEE/SICE International Symposium on System Integration ◽

10.1109/si.2008.4770434 ◽

2008 ◽

Author(s):

Shinya Kubota ◽

Minoru Watanabe

Keyword(s):

Array Architecture ◽

Gate Array

Download Full-text

Architecture and Design Methodology of Self-Optimizing Mechatronic Systems

Mechatronic Systems Simulation Modeling and Control ◽

10.5772/9121 ◽

2010 ◽

Cited By ~ 2

Author(s):

Jurgen Gausemeier ◽

Sascha Kahl

Keyword(s):

Design Methodology ◽

Mechatronic Systems ◽

Architecture And Design

Download Full-text

Real-time field programmable gate array architecture for computer vision

Journal of Electronic Imaging ◽

10.1117/1.1329341 ◽

2001 ◽

Vol 10 (1) ◽

pp. 289 ◽

Cited By ~ 15

Author(s):

Miguel Arias-Estrada

Keyword(s):

Computer Vision ◽

Real Time ◽

Field Programmable Gate Array ◽

Array Architecture ◽

Field Programmable ◽

Gate Array

Download Full-text

A CMOS gate array architecture for digital signal processing applications

IEEE Journal of Solid-State Circuits ◽

10.1109/4.494203 ◽

1996 ◽

Vol 31 (3) ◽

pp. 410-418

Author(s):

J.-M. Green ◽

H. Klar

Keyword(s):

Signal Processing ◽

Digital Signal Processing ◽

Digital Signal ◽

Array Architecture ◽

Gate Array

Download Full-text

Silicon Nanowire Transistors for Implementing an Field Programmable Gate Array Architecture with Scan Chain

Journal of Nanoelectronics and Optoelectronics ◽

10.1166/jno.2009.1049 ◽

2010 ◽

Vol 4 (3) ◽

pp. 342-352 ◽

Cited By ~ 1

Author(s):

Ahmet Bindal ◽

Tomoko Ogura ◽

Nori Ogura ◽

Sotoudeh Hamedi-Hagh

Keyword(s):

Field Programmable Gate Array ◽

Silicon Nanowire ◽

Nanowire Transistors ◽

Array Architecture ◽

Field Programmable ◽

Gate Array ◽

Scan Chain

Download Full-text

Architecture and design methodology of a 32-bit microprocessor

[1991] Proceedings, Advanced Computer Technology, Reliable Systems and Applications ◽

10.1109/cmpeur.1991.257460 ◽

2002 ◽

Author(s):

F. Bozzetti ◽

C. Silvano

Keyword(s):

Design Methodology ◽

Architecture And Design

Download Full-text

On the communication capability of the self-reconfigurable gate array architecture

Proceedings 16th International Parallel and Distributed Processing Symposium ◽

10.1109/ipdps.2002.1016547 ◽

2002 ◽

Cited By ~ 5

Author(s):

H.M. El-Boghdadi ◽

R. Vaidyanathan ◽

J.L. Trahan ◽

S. Rai

Keyword(s):

The Self ◽

Array Architecture ◽

Communication Capability ◽

Gate Array

Download Full-text

A novel digital chirp generator using a dual clock field programmable gate array architecture

Sixth International Conference on `HF Radio Systems and Techniques' ◽

10.1049/cp:19940529 ◽

1994 ◽

Cited By ~ 1

Author(s):

S. Salous

Keyword(s):

Field Programmable Gate Array ◽

Array Architecture ◽

Field Programmable ◽

Gate Array

Download Full-text