GaAsSb DHBT IC technology for RF and microwave instrumentation

IEEE Compound Semiconductor Integrated Circuit Symposium, 2005. CSIC '05. ◽

10.1109/csics.2005.1531760 ◽

2005 ◽

Cited By ~ 14

Author(s):

T.S. Low ◽

M.W. Dvorak ◽

M. Farhoud ◽

R.E. Yeats ◽

M. Iwamoto ◽

...

Keyword(s):

Microwave Instrumentation ◽

Ic Technology

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Microwave instrumentation

Journal of the Institution of Production Engineers ◽

10.1049/ipej.1959.0016 ◽

1959 ◽

Vol 38 (3) ◽

pp. 131

Author(s):

W.E. Stimson

Keyword(s):

Microwave Instrumentation

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Classification of IC Process Deformation Characteristics Using Memory Fail Bitmaps

ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2004p0566 ◽

2004 ◽

Author(s):

T. Zanon ◽

W. Maly

Keyword(s):

Geometric Characterization ◽

Deformation Characteristics ◽

Analysis Study ◽

Preliminary Results ◽

Failure Patterns ◽

Yield Learning ◽

Sram Memory ◽

Viable Approach ◽

Ic Technology

Abstract Building a portfolio of deformations is the key step for building better defect models for the test and yield learning domain. A viable approach to achieve this goal is through geometric characterization and classification of failure patterns found on memory fail bitmaps. In this paper, we present preliminary results on how to build such a portfolio of deformations for an IC technology of interest based on a fail bitmap analysis study conducted on large, modern SRAM memory products.

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Failure and Stress Analysis of Cu TSVs Using GHz-Scanning Acoustic Microscopy and Scanning Infrared Polariscopy

ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2015p0124 ◽

2015 ◽

Author(s):

Ingrid De Wolf ◽

Ahmad Khaled ◽

Martin Herms ◽

Matthias Wagner ◽

Tatjana Djuric ◽

...

Keyword(s):

Failure Analysis ◽

Stress Analysis ◽

Rayleigh Waves ◽

Acoustic Microscopy ◽

Scanning Acoustic Microscopy ◽

Through Silicon Vias ◽

Stress Anisotropy ◽

Silicon Vias ◽

Ic Technology ◽

Detection Of Defects

Abstract This paper discusses the application of two different techniques for failure analysis of Cu through-silicon vias (TSVs), used in 3D stacked-IC technology. The first technique is GHz Scanning Acoustic Microscopy (GHz- SAM), which not only allows detection of defects like voids, cracks and delamination, but also the visualization of Rayleigh waves. GHz-SAM can provide information on voids, delamination and possibly stress near the TSVs. The second is a reflection-based photoelastic technique (SIREX), which is shown to be very sensitive to stress anisotropy in the Si near TSVs and as such also to any defect affecting this stress, such as delamination and large voids.

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