Rapidly reconfigurable 8-bit chip-scale true-time-delay module for high-bandwidth-preserving, multi-aperture, free-space laser-communication transmitter

2005 ◽  
Author(s):  
D.S. Sumida ◽  
S. Wang ◽  
D.M. Pepper
Keyword(s):  
Time Delay ◽  
Free Space ◽  
Laser Communication ◽  
True Time Delay ◽  
High Bandwidth ◽  
True Time

RF MEMS Extended Tuning Range Varactor and Varactor Based True Time Delay Line Design

PIERS Online ◽  
2008 ◽  
Vol 4 (4) ◽  
pp. 433-436 ◽  
Author(s):  
Yaping Liang ◽  
Calvin W. Domier ◽  
Neville C. Luhmann, Jr.
Keyword(s):  
Time Delay ◽  
Delay Line ◽  
Tuning Range ◽  
Rf Mems ◽  
True Time Delay ◽  
True Time ◽  
Line Design

A multi-octave microwave 6-bit true time delay with low amplitude and delay variation in 65 nm CMOS

2021 ◽  
pp. 1-10
Author(s):  
Yakov Gutkin ◽  
Asher Madjar ◽  
Emanuel Cohen
Keyword(s):  
Time Delay ◽  
Insertion Loss ◽  
Impedance Matching ◽  
Least Significant Bit ◽  
Delay Cell ◽  
True Time Delay ◽  
Unit Cells ◽  
True Time ◽  
And Performance ◽  
Low Amplitude

Abstract In this paper, we describe the design, layout, and performance of a 6-bit TTD (true time delay) chip operating over the entire band of 2–18 GHz. The 1.15 mm2 chip is implemented using TSMC foundry 65 nm technology. The least significant bit is 1 ps. The design is based on the concept of all-pass network with some modifications intended to reduce the number of unit cells. Thus, the first three bits are implemented in a single delay cell. A peaking buffer amplifier between bit 4 and bit 5 is used for impedance matching and partial compensation of the insertion loss slope. The rms delay error of the TTD is <1 ps over most of the frequency band and insertion loss is between 2.5 and 6.3 dB for all 64 states.

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