scholarly journals Timing jitter analysis for clock recovery circuits based on an optoelectronic phase-locked loop (OPLL)

Author(s):  
D. Zibar ◽  
J. Mork ◽  
L.K. Oxenlowe ◽  
M. Galili ◽  
A.T. Clausen
2018 ◽  
Vol 7 (3.12) ◽  
pp. 871
Author(s):  
Thejusraj. H ◽  
Prithivi Raj ◽  
J Selvakumar ◽  
S Praveen Kumar

This paper presents the analysis of various oscillators that generate high frequency of oscillation for high speed communication, clock generation and clock recovery. The Ring oscillator and the Current Starved Voltage Controlled Oscillator(CSVCO) (for 5-stagewithout resistor and with resistor) have been implemented using the Cadence Virtuoso tool in 90 nm technology. The generated frequency of oscillation and the power consumption values of the voltage controlled oscillators have been calculated after inclusion in the PLL, and were also compared to identify the most suitable voltage controlled oscillator for a given application.


1999 ◽  
Vol 34 (8) ◽  
pp. 1063-1073 ◽  
Author(s):  
Terng-Yin Hsu ◽  
Bai-Jue Shieh ◽  
Chen-Yi Lee

2012 ◽  
Author(s):  
Cheng Chen ◽  
Jifang Qiu ◽  
Lingjuan Zhao ◽  
Jian Wu ◽  
Caiyun Lou ◽  
...  

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