A Software-Hardware Co-designed Methodology for Efficient Thread Level Speculation

2017 IEEE International Conference on Computer and Information Technology (CIT) ◽

10.1109/cit.2017.49 ◽

2017 ◽

Cited By ~ 1

Author(s):

Qiong Wang ◽

Jialong Wang ◽

Li Shen ◽

Zhiying Wang

Keyword(s):

Thread Level Speculation

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Reducing the Repairing Penalty on Misspeculation in Thread-Level Speculation

10.1145/3468081.3471120 ◽

2021 ◽

Author(s):

Hiroaki Hirata ◽

Atsushi Nunome

Keyword(s):

Thread Level Speculation

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Support for Thread-Level Speculation into OpenMP

OpenMP in a Heterogeneous World - Lecture Notes in Computer Science ◽

10.1007/978-3-642-30961-8_25 ◽

2012 ◽

pp. 275-278 ◽

Cited By ~ 4

Author(s):

Sergio Aldea ◽

Diego R. Llanos ◽

Arturo González-Escribano

Keyword(s):

Thread Level Speculation

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Software Thread Level Speculation for the Java Language and Virtual Machine Environment

Languages and Compilers for Parallel Computing - Lecture Notes in Computer Science ◽

10.1007/978-3-540-69330-7_21 ◽

2006 ◽

pp. 304-318 ◽

Cited By ~ 13

Author(s):

Christopher J. F. Pickett ◽

Clark Verbrugge

Keyword(s):

Virtual Machine ◽

Java Language ◽

Thread Level Speculation

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Shelving a Code Block for Thread-Level Speculation

2019 20th IEEE/ACIS International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD) ◽

10.1109/snpd.2019.8935751 ◽

2019 ◽

Cited By ~ 1

Author(s):

Daiki Matsunaga ◽

Atsushi Nunome ◽

Hiroaki Hirata

Keyword(s):

Thread Level Speculation

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Energy-Efficient Thread-Level Speculation

IEEE Micro ◽

10.1109/mm.2006.11 ◽

2006 ◽

Vol 26 (1) ◽

pp. 80-91 ◽

Cited By ~ 10

Author(s):

J. Renau ◽

K. Strauss ◽

L. Ceze ◽

Wei Liu ◽

S.R. Sarangi ◽

...

Keyword(s):

Energy Efficient ◽

Thread Level Speculation

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Parallel genetic algorithm based on Thread-Level Speculation

2010 International Conference on Audio, Language and Image Processing ◽

10.1109/icalip.2010.5684374 ◽

2010 ◽

Author(s):

Zhao Wen-jiang ◽

Yang Hong-bin ◽

Wu Yue

Keyword(s):

Genetic Algorithm ◽

Parallel Genetic Algorithm ◽

Thread Level Speculation

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Towards a Compiler Framework for Thread-Level Speculation

2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing ◽

10.1109/pdp.2011.14 ◽

2011 ◽

Cited By ~ 3

Author(s):

Sergio Aldea ◽

Diego R. Llanos ◽

Arturo Gonzalez-Escribano

Keyword(s):

Compiler Framework ◽

Thread Level Speculation

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Thread-level speculation on off-the-shelf hardware transactional memory

2014 IEEE International Symposium on Workload Characterization (IISWC) ◽

10.1109/iiswc.2014.6983060 ◽

2014 ◽

Cited By ~ 13

Author(s):

Rei Odaira ◽

Takuya Nakaike

Keyword(s):

Transactional Memory ◽

Hardware Transactional Memory ◽

Thread Level Speculation

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The STAMPede approach to thread-level speculation

ACM Transactions on Computer Systems ◽

10.1145/1082469.1082471 ◽

2005 ◽

Vol 23 (3) ◽

pp. 253-300 ◽

Cited By ~ 98

Author(s):

J. Gregory Steffan ◽

Christopher Colohan ◽

Antonia Zhai ◽

Todd C. Mowry

Keyword(s):

Thread Level Speculation

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LogSPoTM: a scalable thread level speculation model based on transactional memory

2008 13th Asia-Pacific Computer Systems Architecture Conference ◽

10.1109/apcsac.2008.4625443 ◽

2008 ◽

Cited By ~ 2

Author(s):

Rui Guo ◽

Hong An ◽

Ruiling Dou ◽

Ming Cong ◽

Yaobin Wang ◽

...

Keyword(s):

Transactional Memory ◽

Model Based ◽

Thread Level Speculation

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