H.264 search window size algorithm for fast and efficient video coding with single pixel precision and no background estimation for motion detection

Author(s):  
G. Bailo ◽  
M. Bariani ◽  
A. Chiappori ◽  
F. Sguanci
Author(s):  
Manoranjan Paul ◽  
Manzur Murshed

People’s demands are escalating with technology advances. Now, people are not happy with only text or voice messages, they like to see video as well. Video transmission through limited bandwidth, for example, an existing telephone line, requires an efficient video coding technique. Unfortunately, existing video coding standards have some limitations due to this demand. Recently, a pattern-based video coding technique has established its potentiality to improve the coding compared to the recent standard H.264 in the range of low bit rates. This chapter describes this technique with its background, features, recent developments, and future trends.


Author(s):  
Steve Wereley ◽  
Carl Meinhart ◽  
Lichuan Gui ◽  
Derek Tretheway ◽  
Arjun Sud

Recently a new μPIV interrogation algorithm has been proposed in which the interrogation window size is reduced to a single pixel. Such small interrogation window sizes are possible using correlation averaging to increase the effective particle concentration to levels required for correlation analysis to succeed. The random error exhibits the expected behavior of decreasing roughly in proportion to N−1/2 while the bias error exhibits unexpected peak-locking behavior with zero bias error at integer and half integer pixel displacements and maximal errors at one-quarter and three-quarter pixel displacements. Accompanying experiments show the potential of this technique but have not yet been sufficiently refined to confirm this unexpected bias error behavior.


Sensors ◽  
2020 ◽  
Vol 20 (5) ◽  
pp. 1405 ◽  
Author(s):  
Riccardo Peloso ◽  
Maurizio Capra ◽  
Luigi Sole ◽  
Massimo Ruo Roch ◽  
Guido Masera ◽  
...  

In the last years, the need for new efficient video compression methods grown rapidly as frame resolution has increased dramatically. The Joint Collaborative Team on Video Coding (JCT-VC) effort produced in 2013 the H.265/High Efficiency Video Coding (HEVC) standard, which represents the state of the art in video coding standards. Nevertheless, in the last years, new algorithms and techniques to improve coding efficiency have been proposed. One promising approach relies on embedding direction capabilities into the transform stage. Recently, the Steerable Discrete Cosine Transform (SDCT) has been proposed to exploit directional DCT using a basis having different orientation angles. The SDCT leads to a sparser representation, which translates to improved coding efficiency. Preliminary results show that the SDCT can be embedded into the HEVC standard, providing better compression ratios. This paper presents a hardware architecture for the SDCT, which is able to work at a frequency of 188 M Hz , reaching a throughput of 3.00 GSample/s. In particular, this architecture supports 8k UltraHigh Definition (UHD) (7680 × 4320) with a frame rate of 60 Hz , which is one of the best resolutions supported by HEVC.


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