Design and implementation of numerical calculation software package for new high performance materials applied to electrical engineering

2008 ◽  
Author(s):  
Hou Shuping ◽  
Yang Qingxin ◽  
Yan Rongge ◽  
Chen Haiyan ◽  
Yang Wenrong
Keyword(s):  
Numerical Calculation ◽  
Software Package ◽  
High Performance ◽  
Electrical Engineering ◽  
Design And Implementation ◽  
Calculation Software

High Performance Numerical Calculation in Prolog Execution

1988 ◽  
Author(s):  
Robert Yung ◽  
Alvin M. Despain ◽  
Peter Van Roy ◽  
Bruce K. Holmer
Keyword(s):  
Numerical Calculation ◽  
High Performance

scholarly journals Convergence Issues of Hydrodynamic Models of Reservoir Pressure Maintenance Systems

2021 ◽  
Vol 135 (4) ◽  
pp. 32-35
Author(s):  
S. T. Zakenov ◽  
◽  
А. А. Yermekov ◽  
L. K. Nurshakhanova ◽  
Sh. Aijanova ◽  
...  
Keyword(s):  
Initial Data ◽  
Software Package ◽  
Reservoir Pressure ◽  
Hydraulic Characteristics ◽  
Hydrodynamic Models ◽  
Pipeline Network ◽  
Maintenance System ◽  
Maintenance Systems ◽  
Calculation Software

The article presents the problems of correctness of input of initial data, convergence of hydrodynamic models based on the results of calculating the hydraulic characteristics of the ground pipeline network of the reservoir pressure maintenance system using an automated calculation software package.

scholarly journals Design and implementation of CNTFET based ternary 1x1 memories

2019 ◽  
Vol 8 (3) ◽  
pp. 175 ◽  
Author(s):  
S.Tamil Selvan ◽  
M. Sundararajan
Keyword(s):  
High Performance ◽  
Data Access ◽  
Cmos Technology ◽  
Access Time ◽  
The Novel ◽  
Design And Implementation ◽  
Technology Process ◽  
Sram Cell ◽  
And Performance ◽  
Power Application

In this paper presented Design and implementation of CNTFET based Ternary 1x1 RAM memories high-performance digital circuits. CNTFET Ternary 1x1 SRAM memories is implement using 32nm technology process. The CNTFET decresase the diameter and performance matrics like delay,power and power delay, The CNTFET Ternary 6T SRAM cell consists of two cross coupled Ternary inverters one is READ and another WRITE operations of the Ternary 6T SRAM cell are performed with the Tritline using HSPICE and Tanner tools in this tool is performed high accuracy. The novel based work can be used for Low Power Application and Access time is less of compared to the conventional CMOS Technology. The CNTFET Ternary 6T SRAM array module (1X1) in 32nm technology consumes only 0.412mW power and data access time is about 5.23ns.

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