Parameters calculation and structure design of pipe belt conveyer

The article studies different shell constructions of mid-water trawls and their properties. The problem settled is suggested to be solved taking into account real geometric interrelations between spacious and surface properties of cone shells. The author suggests to accept a so-called geometric quality coefficient as a criterion of the properties of a conical shell, which represents the ratio of the shell to the area of its side surface and by analogy to use it to the shell of the trawl. The relationship between the trawl dimensions and geometric quality coefficient have been studied. Comparing these figures with the actual characteristics of trawls showed good convergence. According to the results of theoretic analysis and parameters calculation, trawl large-size shells will always have advantages in geometric characteristics over mid-size and, especially, small-size shells. The results of the analysis can be used for approximate calculations of the parameters of the trawl and justification of ways to improve the performance of existing mid-water trawls.

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In silico ADME, Bioactivity and Toxicity Parameters Calculation of Some Selected Anti-Tubercular Drugs

International Journal of Pharmaceutical and Phytopharmacological Research ◽

10.24896/eijppr.2016661 ◽

2016 ◽

Vol 6 (6) ◽

pp. 77 ◽

Cited By ~ 1

Author(s):

Shashank Shekhar Mishra ◽

Chandra Shekhar Sharma ◽

Hemendra Pratap Singh ◽

Harshda Pandiya ◽

Neeraj Kumar

Keyword(s):

Antibiotic Resistance ◽

In Silico ◽

Bacillus Calmette Guerin ◽

Computational Investigation ◽

Pharmacological Profile ◽

In Silico Toxicity ◽

Is Development ◽

Potent Drug ◽

Minimal Resistance ◽

Parameters Calculation

Tuberculosis, one of the most frequent infectious diseases, is caused by a mycobacterium tuberculosis bacteria and it infects several hundred million people each year, results in several million deaths annually. Because there is development of antibiotic resistance, the disease becomes incurable. So, in the absence of effective and potent drug with minimal resistance problems, the mortality rate increases annually. In this computational investigation, we performed In-silico ADME, bioactivity and toxicity parameters calculation of some selected anti-tuberculosis agents. To design a new molecule having good pharmacological profile, this study will provide the lead information.Key Words: Tuberculosis (TB), Bacillus Calmette-Guerin vaccine, TPSA, In Silico toxicity

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Efficient Instruction and Data Caching for High Performance Embedded Processors

Jornada de Jóvenes Investigadores del I3A ◽

10.26754/jji-i3a.201201788 ◽

1970 ◽

pp. 9

Author(s):

A. Ferrerón Labari ◽

D. Suárez Gracia ◽

V. Viñals Yúfera

Keyword(s):

Embedded Systems ◽

Power Consumption ◽

Low Power ◽

Interconnection Networks ◽

High Performance ◽

Critical Issue ◽

Content Management ◽

Structure Design ◽

Portable Devices ◽

On Chip

In the last years, embedded systems have evolved so that they offer capabilities we could only find before in high performance systems. Portable devices already have multiprocessors on-chip (such as PowerPC 476FP or ARM Cortex A9 MP), usually multi-threaded, and a powerful multi-level cache memory hierarchy on-chip. As most of these systems are battery-powered, the power consumption becomes a critical issue. Achieving high performance and low power consumption is a high complexity challenge where some proposals have been already made. Suarez et al. proposed a new cache hierarchy on-chip, the LP-NUCA (Low Power NUCA), which is able to reduce the access latency taking advantage of NUCA (Non-Uniform Cache Architectures) properties. The key points are decoupling the functionality, and utilizing three specialized networks on-chip. This structure has been proved to be efficient for data hierarchies, achieving a good performance and reducing the energy consumption. On the other hand, instruction caches have different requirements and characteristics than data caches, contradicting the low-power embedded systems requirements, especially in SMT (simultaneous multi-threading) environments. We want to study the benefits of utilizing small tiled caches for the instruction hierarchy, so we propose a new design, ID-LP-NUCAs. Thus, we need to re-evaluate completely our previous design in terms of structure design, interconnection networks (including topologies, flow control and routing), content management (with special interest in hardware/software content allocation policies), and structure sharing. In CMP environments (chip multiprocessors) with parallel workloads, coherence plays an important role, and must be taken into consideration.

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