Advanced Pseudo Differential Amplifier with Output Common Mode Regulation and Phase Shift Retention

2016 ◽  
Author(s):  
Sagarika Donepudi ◽  
Michael Koberle ◽  
Wolfgang Horn
Keyword(s):  
Phase Shift ◽  
Differential Amplifier ◽  
Common Mode

220–325-GHz 25-dB-Gain Differential Amplifier With High Common-Mode-Rejection Circuit in 60-nm InP-HEMT Technology

2021 ◽  
pp. 1-1
Author(s):  
Hiroshi Hamada ◽  
Takuya Tsutsumi ◽  
Adam Pander ◽  
Hideaki Matsuzaki ◽  
Hiroki Sugiyama ◽  
...  
Keyword(s):  
Differential Amplifier ◽  
Common Mode ◽  
Inp Hemt

scholarly journals Design of 16-Bit SAR ADC Using DTMOS Technique

2021 ◽  
Vol 12 (3) ◽  
pp. 3046-3054
Author(s):  
Yarlagadda Archana Et.al
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Supply ◽  
Sar Adc ◽  
Differential Amplifier ◽  
Common Mode ◽  
Biomedical Implant ◽  
Low Leakage ◽  
Noise Rejection ◽  
Proper Operation

This paper presents a 16-bit 100MS/s SAR ADC with 1V power supply for biomedical implant systems developed with low power technique i.e., DTMOS logic. It consists of a R-2R DAC, low-power comparator, a digital SAR logic with low-leakage. The designed comparator is a differential architecture that has used to have an excellent, common-mode noise rejection. Comparator was created for proper operation to remain in saturation and could be used with differential amplifier. The comparator is the chief block of power consumption, so we focused mainly much of ability we make to design this module. The ADC is designed using Cadence virtuoso with CMOS 45nm technology. For SFDR, SNR, ENOB and power consumption, the converter utilizes 63.97dB, 51.06 dB, 15.15 and 528.8uw.

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