A 75.1dB SNDR, 80.2dB DR, 4th-order feed-forward continuous-time sigma-delta modulator with hybrid integrator for silicon TV-tuner application

Author(s):  
Chen-Yen Ho ◽  
Zwei-Mei Lee ◽  
Mu-Chen Huang ◽  
Sheng-Jui Huang
2007 ◽  
Vol 42 (12) ◽  
pp. 2696-2705 ◽  
Author(s):  
Lucien J. Breems ◽  
Robert Rutten ◽  
Robert H. M. van Veldhoven ◽  
Gerard van der Weide

2011 ◽  
Vol 02 (03) ◽  
pp. 201-209 ◽  
Author(s):  
Jhin-Fang Huang ◽  
Yan-Cheng Lai ◽  
Wen-Cheng Lai ◽  
Ron-Yi Liu

2014 ◽  
Vol 609-610 ◽  
pp. 1176-1180
Author(s):  
Liang Liu ◽  
Song Chen ◽  
Chong He ◽  
Liang Yin ◽  
Xiao Wei Liu

Sigma Delta modulator is widely used in ADC for kinds of micro inertial sensors, Sigma Delta ADC can be easily integrated with digital circuits. It possesses some performances of good linearity and high accuracy, while it has no such strict requirements for the match of device dimensions. In this paper, the design of third-order Sigma Delta modulator with a structure of single-loop full feed-forward is accomplished, meanwhile it uses local feedback for zero optimization to improve the shaping capacity of the modulator noise within the signal bandwidth. The OSR (over-sampling rate) of the modulator is 128 and the signal bandwidth is 10 kHz. By the system model building and simulation in the Simulink of MATALAB, the SNR is 96.3 dB and the ENOB is 15.71 bits. Then the modulator is implemented into transistor-level circuits with 0.5um process, by the simulation in Spectre of Cadence, the SNR is 88.5 dB and the ENOB is 14.41 bits. 搜


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