An integrated hardmask/poly RIE process for sub-0.25 um gate etch

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902598 ◽

2002 ◽

Author(s):

S. Shah ◽

J. Andrews ◽

M. Goss ◽

R. Kurjansky

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