scholarly journals A model checking framework for hierarchical systems

2011 ◽  
Author(s):  
Truong Khanh Nguyen ◽  
Jun Sun ◽  
Yang Liu ◽  
Jin Song Dong
Keyword(s):  
Model Checking ◽  
Hierarchical Systems

scholarly journals Improved model checking of hierarchical systems

2012 ◽  
Vol 210 ◽  
pp. 68-86 ◽  
Author(s):  
Benjamin Aminof ◽  
Orna Kupferman ◽  
Aniello Murano
Keyword(s):  
Model Checking ◽  
Hierarchical Systems ◽  
Improved Model

Logical foundations of hierarchical model checking

2018 ◽  
Vol 52 (4) ◽  
pp. 539-563 ◽  
Author(s):  
Norihiro Kamide
Keyword(s):  
Model Checking ◽  
Temporal Logic ◽  
Hierarchical Model ◽  
Design Methodology ◽  
Linear Time ◽  
Hierarchical Systems ◽  
Content Type ◽  
Computation Tree Logic ◽  
Computation Tree ◽  
Linear Time Temporal Logic

Purpose The purpose of this paper is to develop new simple logics and translations for hierarchical model checking. Hierarchical model checking is a model-checking paradigm that can appropriately verify systems with hierarchical information and structures. Design/methodology/approach In this study, logics and translations for hierarchical model checking are developed based on linear-time temporal logic (LTL), computation-tree logic (CTL) and full computation-tree logic (CTL*). A sequential linear-time temporal logic (sLTL), a sequential computation-tree logic (sCTL), and a sequential full computation-tree logic (sCTL*), which can suitably represent hierarchical information and structures, are developed by extending LTL, CTL and CTL*, respectively. Translations from sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are defined, and theorems for embedding sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are proved using these translations. Findings These embedding theorems allow us to reuse the standard LTL-, CTL-, and CTL*-based model-checking algorithms to verify hierarchical systems that are modeled and specified by sLTL, sCTL and sCTL*. Originality/value The new logics sLTL, sCTL and sCTL* and their translations are developed, and some illustrative examples of hierarchical model checking are presented based on these logics and translations.

scholarly journals LTL with Arithmetic and its Applications in Reasoning about Hierarchical Systems

10.29007/wpg3 ◽  
2018 ◽  
Author(s):  
Rachel Faran ◽  
Orna Kupferman
Keyword(s):  
Model Checking ◽  
Blow Up ◽  
Satisfiability Problem ◽  
Theoretic Approach ◽  
Hierarchical Systems ◽  
Infinite Domain ◽  
Composite Systems ◽  
System A ◽  
Computational Bottleneck ◽  
Naive Model

The computational bottleneck in model-checking applications is the blow-up involved in the translation of systems to their mathematical model. This blow up is especially painful in systems with variables over an infinite domain, and in composite systems described by means of their underlying components. We introduce and study linear temporal logic with arithmetic (LTLA, for short), where formulas include variables that take values in Z, and in which linear arithmetic over these values is supported. We develop an automata-theoretic approach for reasoning about LTLA formulas and use it in order to solve, in PSPACE, the satisfiability problem for the existential fragment of LTLA and the model-checking problem for its universal fragment. We show that these results are tight, as a single universally- quantified variable makes the satisfiability problem for LTLA undecidable.In addition to reasoning about systems with variables over Z, we suggest applications of LTLA in reasoning about hierarchical systems, which consist of subsystems that can call each other in a hierarchical manner. We use the values in Z in order to describe the nesting depth of components in the system. A naive model-checking algorithm for hierarchical systems flattens them, which involves an exponential blow up. We suggest a model-checking algorithm that avoids the flattening and avoids a blow up in the number of components.

scholarly journals Parameter Generation for Hierarchical Scheduling Systems Based on Model Checking

2019 ◽  
Vol 37 (6) ◽  
pp. 1302-1309
Author(s):  
Pujie Han ◽  
Zhengjun Zhai ◽  
Yanhong Lu ◽  
Yunxi Li
Keyword(s):  
Model Checking ◽  
Formal Model ◽  
Timed Automata ◽  
Classical Model ◽  
Global Optimum ◽  
Symbolic Model Checking ◽  
Hierarchical Systems ◽  
Hierarchical Scheduling ◽  
Symbolic Model ◽  
Integrated Modular Avionics

A parameter generation method based on model checking is proposed to tackle the parameter selection of hierarchical scheduling systems in Integrated Modular Avionics (IMA) by combining the classical symbolic model checking and the Statistical Model Checking (SMC). It builds a generic timed automata network to describe the temporal behavior of hierarchical systems. A distributed genetic algorithm is adopted to search the optimum partition parameters with respect to processor utilization while guaranteeing the schedulability of the system, which is formulated as safety properties of symbolic model checking and hypothesis testing of SMC. Comparing with the widely-used response time analysis, the formal model of this method is more expressive to cover complex features. The application of SMC alleviates the "state space explosion" of classical model checking. Finally, the parameter generation experiments show that the present method is able to find the global optimum solutions in the parameter space.

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