A Parallel Decimal Multiplier Using Hybrid Binary Coded Decimal (BCD) Codes

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH) ◽

10.1109/arith.2016.8 ◽

2016 ◽

Cited By ~ 3

Author(s):

Xiaoping Cui ◽

Weiqiang Liu ◽

Dong Wenwen ◽

Fabrizio Lombardi

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