Advanced code sequences design for pedestrian detection in millimeter-wave pulse-compression radar system

Author(s):  
Kiyotaka Kobayashi ◽  
Tadashi Morita ◽  
Hirohito Mukai ◽  
Takaaki Kishigami ◽  
Yoichi Nakagawa
2013 ◽  
Vol E96.B (9) ◽  
pp. 2313-2322 ◽  
Author(s):  
Takaaki KISHIGAMI ◽  
Tadashi MORITA ◽  
Hirohito MUKAI ◽  
Maiko OTANI ◽  
Yoichi NAKAGAWA

Radio Science ◽  
1990 ◽  
Vol 25 (5) ◽  
pp. 1095-1100
Author(s):  
Y. G. K. Patro ◽  
K. R. Suresh Nair ◽  
P. Balamuralidhar

Author(s):  
Philipp Ritter

Abstract Next-generation automotive radar sensors are increasingly becoming sensitive to cost and size, which will leverage monolithically integrated radar system-on-Chips (SoC). This article discusses the challenges and the opportunities of the integration of the millimeter-wave frontend along with the digital backend. A 76–81 GHz radar SoC is presented as an evaluation vehicle for an automotive, fully depleted silicon-over-insulator 22 nm CMOS technology. It features a digitally controlled oscillator, 2-millimeter-wave transmit channels and receive channels, an analog base-band with analog-to-digital conversion as well as a digital signal processing unit with on-chip memory. The radar SoC evaluation chip is packaged and flip-chip mounted to a high frequency printed circuit board for functional demonstration and performance evaluation.


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