A reconfigurable CMOS power amplifier with flexible matching network

2006 ◽  
Author(s):  
Seok-Oh Yun ◽  
Hyung-Joun Yoo
Keyword(s):  
Power Amplifier ◽  
Matching Network ◽  
Flexible Matching

scholarly journals 1.2–2.8-GHz 32.4-dBm Digital Power Amplifier With Balance-Compensated Matching Network

2021 ◽  
Vol 31 (1) ◽  
pp. 41-44
Author(s):  
Tianyi Wang ◽  
Huizhen Jenny Qian ◽  
Bingzheng Yang ◽  
Xun Luo
Keyword(s):  
Power Amplifier ◽  
Matching Network

Broad-band power amplifier with a novel tunable output matching network

2005 ◽  
Vol 53 (11) ◽  
pp. 3606-3614 ◽  
Author(s):  
Haitao Zhang ◽  
Huai Gao ◽  
Guann-Pyng Li
Keyword(s):  
Power Amplifier ◽  
Broad Band ◽  
Matching Network ◽  
Band Power

An X-Band Broadband High-Efficiency Power Amplifier with Class-J Mode Matching Network

2021 ◽  
Author(s):  
Ping Zhang ◽  
Xiuping Li ◽  
Zemeng Huang ◽  
Yubing Li ◽  
Tao Tan ◽  
...  
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Mode Matching ◽  
Matching Network ◽  
X Band

A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Premmilaah Gunasegaran ◽  
Jagadheswaran Rajendran ◽  
Selvakumar Mariappan ◽  
Yusman Mohd Yusof ◽  
Zulfiqar Ali Abdul Aziz ◽  
...  
Keyword(s):  
Power Consumption ◽  
Output Power ◽  
Power Amplifier ◽  
Maximum Output Power ◽  
Maximum Output ◽  
Power Gain ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Main Amplifier

Purpose The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA). Design/methodology/approach The linearization mechanism is executed with an aid of a passive linearizer implemented at the gate of the main amplifier to minimize the effect of Cgs capacitance through the generation of opposite phase response at the main amplifier. The inductor-less output matching network presents an almost lossless output matching network which contributes to high gain, PAE and output power. The linearity performance is improved without the penalty of power consumption, power gain and stability. Findings With this topology, the PA delivers more than 20 dB gain for the Bluetooth Low Energy (BLE) Band from 2.4 GHz to 2.5 GHz with a supply headroom of 1.8 V. At the center frequency of 2.45 GHz, the PA exhibits a gain of 23.3 dB with corresponding peak PAE of 40.11% at a maximum output power of 14.3 dBm. At a maximum linear output power of 12.7 dBm, a PAE of 37.3% has been achieved with a peak third order intermodulation product of 28.04 dBm with a power consumption of 50.58 mW. This corresponds to ACLR of – 20 dBc, thus qualifying the PA to operate for BLE operation. Practical implications The proposed technique is able to boost up the efficiency and output power, as well as linearize the PA closer to 1 dB compression point. This reduces the trade-off between linear output power and PAE in CMOS PA design. Originality/value The proposed CMOS PA can be integrated comfortably to a BLE transmitter, allowing it to reduce the transceiver’s overall power consumption.

Impedance-Matching Network Box of the RF Power Amplifier for the RFT-30 Cyclotron

2018 ◽  
Vol 73 (8) ◽  
pp. 1186-1190
Author(s):  
Ho Seung Song ◽  
Young Bae Kong ◽  
Eun Je Lee ◽  
Min Goo Hur
Keyword(s):  
Power Amplifier ◽  
Impedance Matching ◽  
Rf Power ◽  
Matching Network ◽  
Rf Power Amplifier
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