Radiation hardening by design: A novel gate level approach

2011 ◽  
Author(s):  
Massoud Mokhtarpour Ghahroodi ◽  
Mark Zwolinski ◽  
Emre Ozer
Keyword(s):  
Radiation Hardening ◽  
Radiation Hardening By Design

scholarly journals Radiation Hardening by Design of Asynchronous Logic for Hostile Environments

2009 ◽  
Vol 44 (5) ◽  
pp. 1617-1628 ◽  
Author(s):  
David J. Barnhart ◽  
Tanya Vladimirova ◽  
Martin N. Sweeting ◽  
Kenneth S. Stevens
Keyword(s):  
Radiation Hardening ◽  
Asynchronous Logic ◽  
Hostile Environments ◽  
Radiation Hardening By Design

scholarly journals CMOS IC radiation hardening by design

2014 ◽  
Vol 27 (2) ◽  
pp. 251-258 ◽  
Author(s):  
Alessandra Camplani ◽  
Seyedruhollah Shojaii ◽  
Hitesh Shrimali ◽  
Alberto Stabile ◽  
Valentino Liberali
Keyword(s):  
Integrated Circuits ◽  
Total Dose ◽  
Radiation Hardening ◽  
Single Event ◽  
Silicon Area ◽  
Single Event Effects ◽  
Main Drawback ◽  
Conventional Design ◽  
Cmos Ic ◽  
Radiation Hardening By Design

Design techniques for radiation hardening of integrated circuits in commercial CMOS technologies are presented. Circuits designed with the proposed approaches are more tolerant to both total dose and to single event effects. The main drawback of the techniques for radiation hardening by design is the increase of silicon area, compared with a conventional design.

Radiation-Hardening-By-Design of the HighPerformance CMOS Nanometer System-on-chip

2019 ◽  
Vol 2 (1) ◽  
pp. 33-51
Author(s):  
Yu. M. Gerasimov ◽  
◽  
N. G. Grigoryev ◽  
A. V. Kobylyatskiy ◽  
Ya. Ya. Petrichkovich ◽  
...  
Keyword(s):  
System On Chip ◽  
Radiation Hardening ◽  
On Chip ◽  
Radiation Hardening By Design

The Features of Radiation-Hardening-By-Design of Bulk SRAM Cells

2015 ◽  
Author(s):  
Yuriy M. Gerasimov ◽  
Nikolay G. Grigoryev ◽  
Andrey V. Kobylyatskiy ◽  
Yaroslav Ya. Petrichkovich ◽  
Tatiana V. Solokhina
Keyword(s):  
Radiation Hardening ◽  
Radiation Hardening By Design
Sign in / Sign up

Export Citation Format

Share Document