scholarly journals Towards Dynamic and Partial Reconfigurable Hardware Architectures for Cryptographic Algorithms on Embedded Devices

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 221720-221742
Author(s):  
Arkan Alkamil ◽  
Darshika G. Perera
Keyword(s):  
Reconfigurable Hardware ◽  
Embedded Devices ◽  
Cryptographic Algorithms ◽  
Hardware Architectures

Mobile Trusted Computing Based on MTM

2010 ◽  
pp. 58-77
Author(s):  
Jan-Erik Ekberg
Keyword(s):  
Trusted Computing ◽  
Security Analysis ◽  
Hardware Security ◽  
Personal Computers ◽  
Embedded Devices ◽  
Computing Device ◽  
Trusted Platform Module ◽  
Consistent Manner ◽  
Hardware Architectures ◽  
Trusted Platform

Trusted computing (TC) denotes a set of security-related hardware and software mechanisms that make a computing device work in a consistent manner, even in the presence of external attacks. For personal computers, TC typically is interpreted to be a software architecture designed around the trusted platform module (TPM), a hardware chip residing on the motherboard and implemented according to the specifications of the Trusted Computing Group (Trusted Computing Group, 2008A). In embedded devices, the state-of-the art in terms of hardware security and operating systems is significantly different from what is present on personal computers. So to stimulate the take-up of TCG technology on handsets as well, the recently approved mobile trusted module (MTM) specification (Trusted Computing Group, 2008B) defines new interfaces and adaptation options that match the requirements of the handset business ecosystem, as well as the hardware in use in the embedded domain. This chapter provides an overview of a few hardware security architectures (in handsets) to introduce the reader to the problem domain. The main focus of the text is in introducing the MTM specification – by first presenting its main functional concepts, and then by adapting it to one of the hardware architectures first described, essentially presenting a plausible practical deployment. The author also presents a brief security analysis of the MTM component, and a few novel ideas regarding how the (mobile) trusted module can be extended, and be made more versatile.

scholarly journals Timed Automaton-Based Quantitative Feasibility Analysis of Symmetric Cipher in Embedded RTOS: A Case Study of AES

2022 ◽  
Vol 2022 ◽  
pp. 1-16
Author(s):  
Yawen Ke ◽  
Xiaofeng Xia
Keyword(s):  
Real Time ◽  
Quantitative Prediction ◽  
Embedded Devices ◽  
The Real ◽  
Embedded Rtos ◽  
Cryptographic Algorithm ◽  
Wide Range ◽  
Cryptographic Algorithms ◽  
Timed Automaton

The real-time operating system (RTOS) has a wide range of application domains and provides devices with the ability to schedule resources. Because of the restricted resources of embedded devices and the real-time constraints of RTOS, the application of cryptographic algorithms in these devices will affect the running systems. The existing approaches for RTOS ciphers’ evaluation are mainly provided by experimental data performance analysis, which, however, lack a clear judgment on the affected RTOS performance indicators, such as task schedulability, bandwidth, as well as a quantitative prediction of the remaining resources of RTOS. By focusing on task schedulability in RTOS, this paper provides a timed automaton-based quantitative approach to judge the feasibility of ciphers in embedded RTOS. First, a cryptographic algorithm execution overhead estimation model is established. Then, by combining the overhead model with a sensitivity analysis method, we can analyze the feasibility of the cryptographic algorithm. Finally, a task-oriented and timed automaton-based model is built to verify the analysis results. We take AES as a case study and carry out experiments on embedded devices. The experimental results show the effectiveness of our approach, which will provide specific feasibility indicators for the application of cryptographic algorithms in RTOS.

Flexible Architectures for Cryptographic Algorithms — A Systematic Literature Review

2019 ◽  
Vol 28 (03) ◽  
pp. 1930003 ◽  
Author(s):  
Muhammad Rashid ◽  
Malik Imran ◽  
Atif Raza Jafri ◽  
Turki F. Al-Somani
Keyword(s):  
Literature Review ◽  
Systematic Literature Review ◽  
Hardware Implementation ◽  
Comprehensive Investigation ◽  
Flexible Hardware ◽  
Cryptographic Algorithms ◽  
Hardware Architectures ◽  
Flexible Architectures ◽  
Secure Transmission

Symmetric and asymmetric cryptographic algorithms are used for a secure transmission of data over an unsecured public channel. In order to use these algorithms in real-time applications, many flexible hardware architectures have been proposed and implemented with multiple design constraints. Therefore, a systematic study is required to analyze various implementation approaches. This paper has focused on the identification and classification of recent research practices pertaining to the flexible hardware implementation of cryptographic algorithms. We have used Systematic Literature Review (SLR) process to identify 51 research articles, published during 2008–2017. The identified researches have been classified according to three design approaches: (1) crypto processor, (2) crypto coprocessor and (3) multicore crypto processor. Consequently, a comparative analysis of various cryptographic algorithms in terms of flexibility, throughput, area, power and implementation technology has been presented. A comprehensive investigation of flexible architectures for implementing cryptographic algorithms facilitates researchers and designers of the domain to select an appropriate design approach for a particular algorithm and/or application according to their needs.

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