Path delay fault simulation of sequential circuits

T.J. Chakraborty; V.D. Agrawal; M.L. Bushnell

doi:10.1109/92.831443

Path delay fault simulation of sequential circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/92.831443 ◽

2000 ◽

Vol 8 (2) ◽

pp. 223-228 ◽

Cited By ~ 7

Author(s):

T.J. Chakraborty ◽

V.D. Agrawal ◽

M.L. Bushnell

Keyword(s):

Fault Simulation ◽

Sequential Circuits ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault

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Path delay fault simulation algorithms for sequential circuits

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224444 ◽

2003 ◽

Cited By ~ 13

Author(s):

T.J. Chakraborty ◽

V.D. Agrawal ◽

M.L. Bushnell

Keyword(s):

Fault Simulation ◽

Sequential Circuits ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault ◽

Simulation Algorithms

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Path delay fault simulation of sequential circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/92.250193 ◽

1993 ◽

Vol 1 (4) ◽

pp. 453-461 ◽

Cited By ~ 33

Author(s):

S. Bose ◽

P. Agrawal ◽

V.D. Agrawal

Keyword(s):

Fault Simulation ◽

Sequential Circuits ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault

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Parallel concurrent path-delay fault simulation using single-input change patterns

Proceedings of 9th International Conference on VLSI Design ◽

10.1109/icvd.1996.489647 ◽

2002 ◽

Cited By ~ 4

Author(s):

M.A. Gharaybeh ◽

M.L. Bushnell ◽

V.D. Agrawal

Keyword(s):

Fault Simulation ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault ◽

Single Input

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Accelerated path delay fault simulation

Digest of Papers. 1992 IEEE VLSI Test Symposium ◽

10.1109/vtest.1992.232715 ◽

2003 ◽

Author(s):

Yuejian Wu ◽

A. Ivanov

Keyword(s):

Fault Simulation ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault

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Synthesis of Sequential Circuits for Robust Path Delay Fault Testability

The Sixth International Conference on VLSI Design ◽

10.1109/icvd.1993.669696 ◽

2005 ◽

Cited By ~ 4

Author(s):

S. Bhatia ◽

N.K. Jha

Keyword(s):

Sequential Circuits ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault

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Statistical path delay fault coverage estimation for synchronous sequential circuits

Proceedings of 9th International Conference on VLSI Design ◽

10.1109/icvd.1996.489613 ◽

2002 ◽

Author(s):

L. Pappu ◽

M.L. Bushnell ◽

V.D. Agrawal ◽

M.K. Srinivas

Keyword(s):

Fault Coverage ◽

Sequential Circuits ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault ◽

Synchronous Sequential Circuits ◽

Coverage Estimation ◽

Fault Coverage Estimation

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Testable path delay fault cover for sequential circuits

Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition ◽

10.1109/eurdac.1996.558208 ◽

2002 ◽

Cited By ~ 17

Author(s):

A. Krstic ◽

S.T. Chakradhar ◽

Kwang-Ting Cheng

Keyword(s):

Sequential Circuits ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault

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On Accelerating Path Delay Fault Simulation of Long Test Sequences

2008 IEEE International Test Conference ◽

10.1109/test.2008.4700625 ◽

2008 ◽

Author(s):

I-De Huang ◽

Yi-Shing Chang ◽

S. Natarajan ◽

R. Sharma ◽

S.K. Gupta

Keyword(s):

Fault Simulation ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault

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Path Delay Fault Simulation on Large Industrial Designs

24th IEEE VLSI Test Symposium ◽

10.1109/vts.2006.55 ◽

2006 ◽

Cited By ~ 8

Author(s):

S. Natarajan ◽

S. Patil ◽

S. Chakravarty

Keyword(s):

Fault Simulation ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault

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FSimGEO: a test generation method for path delay fault test using fault simulation and genetic optimization

Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558) ◽

10.1109/asic.2001.954702 ◽

2002 ◽

Author(s):

Sun Yihe ◽

Wu Qifa

Keyword(s):

Test Generation ◽

Fault Simulation ◽

Genetic Optimization ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault

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