Multicast contention resolution with single-cycle windowing using content addressable FIFO's

1996 ◽  
Vol 4 (5) ◽  
pp. 731-742 ◽  
Author(s):  
K.J. Schultz ◽  
P.G. Gulak
Keyword(s):  
Contention Resolution ◽  
Single Cycle

Logic Test of Single Cycle Access Structure

2012 ◽  
Vol 2 (11) ◽  
pp. 203-205
Author(s):  
S. Ali Ahmed S. Ali Ahmed ◽  
◽  
Syed Jahangir Badashah ◽  
A. Farooq Hussain
Keyword(s):  
Access Structure ◽  
Single Cycle

Recent Studies of Tire Braking Performance

1973 ◽  
Vol 1 (2) ◽  
pp. 121-137 ◽  
Author(s):  
J. L. McCarty ◽  
T. J. W. Leland
Keyword(s):  
Steady State ◽  
Rapid Cycling ◽  
Single Cycle ◽  
Steering Angle ◽  
Slip Ratio ◽  
Factors Affecting ◽  
Braking Performance ◽  
Constant Rate

Abstract The results from recent studies of some factors affecting tire braking and cornering performance are presented together with a discussion of the possible application of these results to the design of aircraft braking systems. The first part of the paper is concerned with steady-state braking, that is, results from tests conducted at a constant slip ratio or steering angle or both. The second part deals with cyclic braking tests, both single cycle, where brakes are applied at a constant rate until wheel lockup is achieved, and rapid cycling of the brakes under control of a currently operational antiskid system.

Hybrid buffer‐based optical packet switch with negative acknowledgment for multilevel data centers

2020 ◽  
Vol 0 (0) ◽  
Author(s):  
Sumit Chandra ◽  
Shahnaz Fatima ◽  
Raghuraj Singh Suryavanshi
Keyword(s):  
Data Centers ◽  
Web Applications ◽  
Optical Switch ◽  
Contention Resolution ◽  
Multilevel Data ◽  
All Optical ◽  
Optical Buffering ◽  
Different Types ◽  
Packet Switch ◽  
Novel Design

AbstractIn the present scenario, data centers serve many functionalities like storage, transfer of data, supporting web applications, etc. In data centers, various levels of hierarchy different types of switches are required; therefore, multifunctional data centers are desired. This paper discusses a novel design for optical switch which can be placed at various levels of hierarchy. In the proposed design, multifunctionality contention resolution schemes which consider electronic and optical buffering and all-optical negative acknowledgment (AO-NACK) are considered. In buffering technologies, contending packets are stored in either in electronic RAM or in fiber delay lines. In case of the AO-NACK scheme, contending packets are blocked, and a negative acknowledgment is sent back to the transmitting node and blocked packets are retransmitted. For various considered schemes, Monte Carlo simulation have been performed, results in terms of packet loss probability are presented, and it has been found that the performance of optical buffering is much superior to electronic buffering and AO-NACK schemes. It is found that, in the AO-NACK scheme, the numbers of retransmitted packets due to contention blocking are 33,304 which can be reduced to 7, by using a small amount of buffer at each node.

scholarly journals Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache

2021 ◽  
Vol 18 (3) ◽  
pp. 1-22
Author(s):  
Michael Stokes ◽  
David Whalley ◽  
Soner Onder
Keyword(s):  
Energy Efficient ◽  
Data Access ◽  
Performance Degradation ◽  
Access Time ◽  
Data Cache ◽  
Energy Usage ◽  
Single Cycle ◽  
Performance Penalty

While data filter caches (DFCs) have been shown to be effective at reducing data access energy, they have not been adopted in processors due to the associated performance penalty caused by high DFC miss rates. In this article, we present a design that both decreases the DFC miss rate and completely eliminates the DFC performance penalty even for a level-one data cache (L1 DC) with a single cycle access time. First, we show that a DFC that lazily fills each word in a DFC line from an L1 DC only when the word is referenced is more energy-efficient than eagerly filling the entire DFC line. For a 512B DFC, we are able to eliminate loads of words into the DFC that are never referenced before being evicted, which occurred for about 75% of the words in 32B lines. Second, we demonstrate that a lazily word filled DFC line can effectively share and pack data words from multiple L1 DC lines to lower the DFC miss rate. For a 512B DFC, we completely avoid accessing the L1 DC for loads about 23% of the time and avoid a fully associative L1 DC access for loads 50% of the time, where the DFC only requires about 2.5% of the size of the L1 DC. Finally, we present a method that completely eliminates the DFC performance penalty by speculatively performing DFC tag checks early and only accessing DFC data when a hit is guaranteed. For a 512B DFC, we improve data access energy usage for the DTLB and L1 DC by 33% with no performance degradation.

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