Design and performance of Multinet switch: a multistage ATM switch architecture with partially shared buffers

1994 ◽  
Vol 2 (6) ◽  
pp. 571-580 ◽  
Author(s):  
H.S. Kim
Author(s):  
N. Moriwaki ◽  
A. Makimoto ◽  
Y. Oguri ◽  
M. Wada ◽  
T. Kozaki

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