A CMOS image sensor module applied for a digital still camera utilizing the TAB on glass (TOG) bonding method

1999 ◽  
Vol 22 (2) ◽  
pp. 160-165 ◽  
Author(s):  
M. Segawa ◽  
M. Ono ◽  
S. Musha ◽  
Y. Kishimoto ◽  
A. Ohashi
Keyword(s):  
Cmos Image Sensor ◽  
Image Sensor ◽  
Sensor Module ◽  
Digital Still Camera ◽  
Bonding Method

Development of Wafer Level Chip Size Packaging Process and its Application to the CMOS Image Sensor Module for Medical Device

2017 ◽  
Vol 137 (2) ◽  
pp. 48-58
Author(s):  
Noriyuki Fujimori ◽  
Takatoshi Igarashi ◽  
Takahiro Shimohata ◽  
Takuro Suyama ◽  
Kazuhiro Yoshida ◽  
...  
Keyword(s):  
Medical Device ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Wafer Level ◽  
Packaging Process ◽  
Sensor Module ◽  
Chip Size

Advances in Wafer Level Processing and Integration for CIS Module Manufacturing

2010 ◽  
Vol 2010 (1) ◽  
pp. 000378-000384
Author(s):  
Bioh Kim ◽  
Thorsten Matthias ◽  
Gerald Kreindl ◽  
Viorel Dragoi ◽  
Markus Wimplinger ◽  
...  
Keyword(s):  
Low Cost ◽  
Cost Effective ◽  
High Volume ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Handheld Devices ◽  
Wafer Level ◽  
Sensor Module ◽  
Integration Techniques ◽  
Backside Illuminated

This article presents the advances in wafer-level processing and integration techniques for CMOS image sensor module manufacturing. CMOS image sensors gave birth to the low-cost, high-volume camera phone market and are being adopted for various high-end applications. The backside illumination technique has significant advantages over the front-side illumination due to separation of the optical path from the metal interconnects. Wafer bonding plays a key role in manufacturing backside illuminated sensors. The cost-effective integration of miniaturized cameras in various handheld devices becomes realized through the introduction of CMOS image sensor modules or camera modules manufactured with wafer-level processing and integration techniques. We developed various technologies enabling wafer-level processing and integration, such as (a) wafer-to-wafer permanent bonding with oxide or polymer layers for manufacturing backside illuminated sensor wafers, (b) wafer-level lens molding and stacking based on UV imprint lithography for making wafer-level optics, (c) conformal coating of various photoresists within high aspect ratio through-silicon vias, and (d) advanced backside lithography for various metallization processes in wafer-level packaging. Those techniques pave the way to the future growth of the digital imaging industry by improving the electrical and optical aspects of devices as well as the module manufacturability.

An Over 120dB Dynamic Range Linear Response Single Exposure CMOS Image Sensor with Two-stage Lateral Overflow Integration Trench Capacitors

2020 ◽  
Vol 2020 (7) ◽  
pp. 143-1-143-6 ◽  
Author(s):  
Yasuyuki Fujihara ◽  
Maasa Murata ◽  
Shota Nakayama ◽  
Rihito Kuroda ◽  
Shigetoshi Sugawa
Keyword(s):  
Linear Response ◽  
Dynamic Range ◽  
Signal To Noise Ratio ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Signal To Noise ◽  
Single Exposure ◽  
Two Stage ◽  
Noise Ratio ◽  
Maximum Signal

This paper presents a prototype linear response single exposure CMOS image sensor with two-stage lateral overflow integration trench capacitors (LOFITreCs) exhibiting over 120dB dynamic range with 11.4Me- full well capacity (FWC) and maximum signal-to-noise ratio (SNR) of 70dB. The measured SNR at all switching points were over 35dB thanks to the proposed two-stage LOFITreCs.

Extending Electrical Scanning Probe Microscopy Measurements of Semiconductor Devices Using Microwave Impedance Microscopy

2015 ◽  
Author(s):  
Benedict Drevniok ◽  
St. John Dixon-Warren ◽  
Oskar Amster ◽  
Stuart L Friedman ◽  
Yongliang Yang
Keyword(s):  
Scanning Probe Microscopy ◽  
Semiconductor Devices ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Scanning Probe ◽  
Cross Sectional ◽  
Probe Microscopy ◽  
Dopant Profiling ◽  
Capacitance Voltage

Abstract Scanning microwave impedance microscopy was used to analyze a CMOS image sensor sample to reveal details of the dopant profiling in planar and cross-sectional samples. Sitespecific capacitance-voltage spectroscopy was performed on different regions of the samples.

A 10-bit ratio-independent cyclic ADC with offset canceling for a CMOS image sensor

2014 ◽  
Vol 35 (3) ◽  
pp. 035005 ◽  
Author(s):  
Kaiming Nie ◽  
Suying Yao ◽  
Jiangtao Xu ◽  
Zhaorui Jiang
Keyword(s):  
Cmos Image Sensor ◽  
Image Sensor ◽  
Cyclic Adc
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