Non-blocking collector InP/GaAs/sub 0.51/Sb/sub 0.49//InP double heterojunction bipolar transistors with a staggered lineup base-collector junction

1999 ◽  
Vol 20 (4) ◽  
pp. 155-157 ◽  
Author(s):  
C.R. Bolognesi ◽  
N. Matine ◽  
R.W. Dvorak ◽  
X.G. Xu ◽  
J. Hu ◽  
...  
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Bipolar Transistors ◽  
Double Heterojunction ◽  
Collector Junction

Comparative study of InP/InGaAs double heterojunction bipolar transistors with InGaAsP spacer at base-collector junction

2013 ◽  
Vol 47 (10) ◽  
pp. 1391-1396 ◽  
Author(s):  
Jung-Hui Tsai ◽  
Ching-Sung Lee ◽  
Jia-Cing Jhou ◽  
You-Ren Wu ◽  
Chung-Cheng Chiang ◽  
...  
Keyword(s):  
Comparative Study ◽  
Heterojunction Bipolar Transistors ◽  
Bipolar Transistors ◽  
Double Heterojunction ◽  
Collector Junction

17 Gbit/s pin-PD/decision circuit using InP/InGaAs double-heterojunction bipolar transistors

1996 ◽  
Vol 32 (4) ◽  
pp. 393 ◽  
Author(s):  
M. Yoneyama ◽  
E. Sano ◽  
S. Yamahata ◽  
Y. Matsuoka ◽  
M. Yaita
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Bipolar Transistors ◽  
Double Heterojunction ◽  
Decision Circuit

scholarly journals Performance prediction of InP/GaAsSb double heterojunction bipolar transistors for THz applications

2021 ◽  
Vol 130 (3) ◽  
pp. 034502
Author(s):  
Xin Wen ◽  
Akshay Arabhavi ◽  
Wei Quan ◽  
Olivier Ostinelli ◽  
Chhandak Mukherjee ◽  
...  
Keyword(s):  
Performance Prediction ◽  
Heterojunction Bipolar Transistors ◽  
Bipolar Transistors ◽  
Double Heterojunction ◽  
Thz Applications

Surface Leakage in GaN/InGaN Double Heterojunction Bipolar Transistors

2009 ◽  
Vol 30 (11) ◽  
pp. 1119-1121 ◽  
Author(s):  
Shyh-Chiang Shen ◽  
Yi-Che Lee ◽  
Hee-Jin Kim ◽  
Yun Zhang ◽  
Suk Choi ◽  
...  
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Bipolar Transistors ◽  
Double Heterojunction ◽  
Surface Leakage

Prevention of InP/InGaAs/InP Double Heterojunction Bipolar Transistors from Current Gain Reduction during Passivation

2004 ◽  
Vol 833 ◽  
Author(s):  
Byoung-Gue Min ◽  
Jong-Min Lee ◽  
Seong-Il Kim ◽  
Chul-Won Ju ◽  
Kyung-Ho Lee
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Silicon Oxide ◽  
Surface Recombination ◽  
Surface States ◽  
Bipolar Transistors ◽  
Base Layer ◽  
Current Gain ◽  
Device Structure ◽  
Double Heterojunction ◽  
Gain Reduction

ABSTRACTA significant degradation of current gain of InP/InGaAs/InP double heterojunction bipolar transistors was observed after passivation. The amount of degradation depended on the degree of surface exposure of the p-type InGaAs base layer according to the epi-structure and device structure. The deposition conditions such as deposition temperature, kinds of materials (silicon oxide, silicon nitride and aluminum oxide) and film thickness were not major variables to affect the device performance. The gain reduction was prevented by the BOE treatment before the passivation. A possible explanation of this behavior is that unstable non-stoichiometric surface states produced by excess In, Ga, or As after mesa etching are eliminated by BOE treatment and reduce the surface recombination sites.

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