Applications of distributed arithmetic to digital signal processing: a tutorial review

1989 ◽  
Vol 6 (3) ◽  
pp. 4-19 ◽  
Author(s):  
S.A. White
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Digital Signal ◽  
Distributed Arithmetic

Modified Distributed Arithmetic Concept for Implementations Targeted at Heterogeneous FPGAs

2010 ◽  
Vol 56 (4) ◽  
pp. 345-350
Author(s):  
Mariusz Rawski
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Digital Signal ◽  
Efficient Implementation ◽  
Heterogeneous Structure ◽  
Distributed Arithmetic ◽  
Architecture Exploration ◽  
Flexible Architecture ◽  
Heterogeneous Fpga

Modified Distributed Arithmetic Concept for Implementations Targeted at Heterogeneous FPGAsDistributed Arithmetic (DA) plays an important role in designing digital signal processing modules for FPGA architectures. It allows replacing multiply-and-accumulate (MAC) operations with combinational blocks. The quality of implementations based on DA strongly depends on efficiency of methods that map combinational DA block into FPGA resources. Since modern FPGAs have heterogeneous structure, there is a need for quality algorithms to target these structures and the need for flexible architecture exploration aiding in appropriate mapping. The paper presents a modification of DA concept that allows for very efficient implementation in heterogeneous FPGA architectures.

VLSI Architecture with a Configurable Pipeline

2020 ◽  
Vol 11 (5) ◽  
pp. 270-276
Author(s):  
V. V. Korneev ◽  
◽  
I. E. Tarasov ◽  
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Vlsi Architecture ◽  
Digital Signal ◽  
Distributed Arithmetic ◽  
28 Nm

The analysis carried out in the article shows the possibility of creating a problem-oriented VLSI, fabricated according to the technological standards of 28 nm or less, for at least one family of digital signal processing problems using similar computing nodes in structure. The use of distributed arithmetic allows one to apply a technique based on performing only those multiplication steps for which non-zero digits are set in the corresponding positions of the filter coefficients. Therefore, the performance of 200 nodes executing 2 steps at 1 GHz is equivalent to approximately 80 GMAC/s/mm2 for 16-bit coefficients. The VLSI architecture view opens up the possibility to study the effectiveness of implementing other families of tasks and refine the architectural parameters for their implementation. The proposed functionality of VLSI computing nodes allows them to be used in various fields of technology, which potentially increases the need for the release of such VLSI.

scholarly journals Digital signal processing designing for FPGA architectures

2007 ◽  
Vol 20 (3) ◽  
pp. 437-459 ◽  
Author(s):  
Mariusz Rawski ◽  
Bogdan Falkowski ◽  
Tadeusz Łuba
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Digital Signal ◽  
Digital Signal Processors ◽  
Distributed Arithmetic ◽  
Embedded Blocks ◽  
Signal Processing Algorithms ◽  
Signal Processors ◽  
High Degree ◽  
Very High

This paper presents the discussion on efficiency of different implementation methodologies of DSP algorithms targeted for modern FPGA architectures. Modern programmable structures are equipped with specialized DSP embedded blocks that allow implementing digital signal processing algorithms with use of the methodology known from digital signal processors. On the first place however, programmable architectures give the designer the possibility to increase efficiency of designed system by exploitation of parallelism of implemented algorithms. Moreover, it is possible to apply special techniques such as distributed arithmetic (DA) that will boost the performance of designed processing systems. Additionally, application of the functional decomposition based methods, known to be best suited for FPGA structures allows utilizing possibilities of programmable technology in very high degree. The paper presents results of comparison of different design approaches in this area.

Method of estimation of hidden correlation of narrowband noise signals

2019 ◽  
pp. 34-39 ◽  
Author(s):  
E.I. Chernov ◽  
N.E. Sobolev ◽  
A.A. Bondarchuk ◽  
L.E. Aristarhova
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
New Technology ◽  
Digital Signal ◽  
Measuring Instruments ◽  
Central Frequency ◽  
Pearson Criterion ◽  
Useful Signal ◽  
Band Limited ◽  
Narrowband Noise

The concept of hidden correlation of noise signals is introduced. The existence of a hidden correlation between narrowband noise signals isolated simultaneously from broadband band-limited noise is theoretically proved. A method for estimating the latent correlation of narrowband noise signals has been developed and experimentally investigated. As a result of the experiment, where a time frag ent of band-limited noise, the basis of which is shot noise, is used as the studied signal, it is established: when applying the Pearson criterion, there is practically no correlation between the signal at the Central frequency and the sum of signals at mirror frequencies; when applying the proposed method for the analysis of the same signals, a strong hidden correlation is found. The proposed method is useful for researchers, engineers and metrologists engaged in digital signal processing, as well as developers of measuring instruments using a new technology for isolating a useful signal from noise – the method of mirror noise images.

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