Heterogeneous technology mapping for area reduction in FPGAs with embedded memory arrays

S.J.E. Wilton

doi:10.1109/43.822620

Heterogeneous technology mapping for area reduction in FPGAs with embedded memory arrays

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.822620 ◽

2000 ◽

Vol 19 (1) ◽

pp. 56-68 ◽

Cited By ~ 13

Author(s):

S.J.E. Wilton

Keyword(s):

Technology Mapping ◽

Embedded Memory ◽

Area Reduction ◽

Memory Arrays

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Memmap: technology mapping algorithm for area reduction in FPGAs with embedded memory arrays using reconvergence analysis

Proceedings Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2004.1269008 ◽

2004 ◽

Cited By ~ 2

Author(s):

A. Manoj Kumar ◽

J. Bobba ◽

V. Kamakoti

Keyword(s):

Technology Mapping ◽

Embedded Memory ◽

Mapping Algorithm ◽

Area Reduction ◽

Memory Arrays

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MemMap-pd: performance driven technology mapping algorithm for FPGAs with embedded memory arrays

18th International Parallel and Distributed Processing Symposium, 2004. Proceedings. ◽

10.1109/ipdps.2004.1303140 ◽

2004 ◽

Author(s):

A.M. Kumar ◽

B. Jayaram ◽

R. Manimegalai ◽

V. Kamakoti

Keyword(s):

Technology Mapping ◽

Embedded Memory ◽

Mapping Algorithm ◽

Memory Arrays

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Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays

Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays - FPGA '00 ◽

10.1145/329166.329182 ◽

2000 ◽

Cited By ~ 2

Author(s):

Steven J. E. Wilton

Keyword(s):

Technology Mapping ◽

Embedded Memory ◽

Memory Arrays

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Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays

2006 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2006.311200 ◽

2006 ◽

Cited By ~ 2

Author(s):

Scott Y.l. Chin ◽

Clarence S.p. Lee ◽

Steven J.E. Wilton

Keyword(s):

Embedded Memory ◽

Memory Arrays

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A Parallel Built-In Self-Diagnostic Method for Nontraditional Faults of Embedded Memory Arrays

IEEE Transactions on Instrumentation and Measurement ◽

10.1109/tim.2004.830785 ◽

2004 ◽

Vol 53 (4) ◽

pp. 915-932 ◽

Cited By ~ 2

Author(s):

V. Arora ◽

W.B. Jone ◽

D.C. Huang ◽

S.R. Das

Keyword(s):

Diagnostic Method ◽

Embedded Memory ◽

Memory Arrays

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A parallel built-in self-diagnostic method for embedded memory arrays

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.992768 ◽

2002 ◽

Vol 21 (4) ◽

pp. 449-465 ◽

Cited By ~ 17

Author(s):

Der-Cheng Huang ◽

Wen-Ben Jone

Keyword(s):

Diagnostic Method ◽

Embedded Memory ◽

Memory Arrays

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FakeFault: a silicon debug software tool for microprocessor embedded memory arrays

Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270) ◽

10.1109/test.1998.743217 ◽

2002 ◽

Author(s):

Young-Jun Kwon ◽

B. Mathew ◽

Hong Hao

Keyword(s):

Software Tool ◽

Embedded Memory ◽

Memory Arrays ◽

Silicon Debug

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Technology mapping for FPGAs with embedded memory blocks

Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays - FPGA '98 ◽

10.1145/275107.275138 ◽

1998 ◽

Cited By ~ 28

Author(s):

Jason Cong ◽

Songjie Xu

Keyword(s):

Technology Mapping ◽

Embedded Memory

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An efficient BIST method for non-traditional faults of embedded memory arrays

IMTC/2002. Proceedings of the 19th IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.00CH37276) ◽

10.1109/imtc.2002.1006910 ◽

2003 ◽

Cited By ~ 2

Author(s):

W.B. Jone ◽

D.C. Huang ◽

S.R. Das

Keyword(s):

Embedded Memory ◽

Memory Arrays

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Implementing logic in FPGA embedded memory arrays: architectural implications

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143) ◽

10.1109/cicc.1998.694978 ◽

2002 ◽

Cited By ~ 5

Author(s):

S.J.E. Wilton

Keyword(s):

Embedded Memory ◽

Memory Arrays

Download Full-text