An evaluation of parallel simulated annealing strategies with application to standard cell placement

1997 ◽  
Vol 16 (4) ◽  
pp. 398-410 ◽  
Author(s):  
J.A. Chandy ◽  
Sungho Kim ◽  
B. Ramkumar ◽  
S. Parkes ◽  
P. Banerjee
Keyword(s):  
Simulated Annealing ◽  
Standard Cell ◽  
Parallel Simulated Annealing ◽  
Cell Placement

scholarly journals A Swarm Random Walk Based Method for the Standard Cell Placement Problem

2014 ◽  
Vol 2014 ◽  
pp. 1-11 ◽  
Author(s):  
Najwa Altwaijry ◽  
Mohamed El Bachir Menai
Keyword(s):  
Simulated Annealing ◽  
Random Walk ◽  
Hybrid Methods ◽  
Vlsi Design ◽  
Standard Cell ◽  
Placement Problem ◽  
Benchmark Suite ◽  
Cell Placement ◽  
On Chip ◽  
Min Cut

The standard cell placement (SCP) problem is a well-studied placement problem, as it is an important step in the VLSI design process. In SCP, cells are placed on chip to optimize some objectives, such as wirelength or area. The SCP problem is solved using mainly four basic methods: simulated annealing, quadratic placement, min-cut placement, and force-directed placement. These methods are adequate for small chip sizes. Nowadays, chip sizes are very large, and hence, hybrid methods are employed to solve the SCP problem instead of the original methods by themselves. This paper presents a new hybrid method for the SCP problem using a swarm intelligence-based (SI) method, called SwarmRW (swarm random walk), on top of a min-cut based partitioner. The resulting placer, called sPL (swarm placer), was tested on the PEKU benchmark suite and compared with several related placers. The obtained results demonstrate the effectiveness of the proposed approach and show that sPL can achieve competitive performance.

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