A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS ICs

1997 ◽  
Vol 32 (1) ◽  
pp. 38-51 ◽  
Author(s):  
Ming-Dou Ker ◽  
Hun-Hsien Chang ◽  
Chung-Yu Wu
1996 ◽  
Vol 4 (3) ◽  
pp. 307-321 ◽  
Author(s):  
Ming-Dou Ker ◽  
Chung-Yu Wu ◽  
Tao Cheng ◽  
Hun-Hsien Chang

Author(s):  
Ta-Lee Yu ◽  
Li-Hsien Fan ◽  
Huijuan Cheng ◽  
Jing Liu ◽  
Xianmin Chen ◽  
...  

2002 ◽  
Vol 38 (19) ◽  
pp. 1099 ◽  
Author(s):  
H. Feng ◽  
R. Zhan ◽  
Q. Wu ◽  
G. Chen ◽  
A. Z. Wang

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