Multiple-valued radix-2 signed-digit arithmetic circuits for high-performance VLSI systems

1990 ◽  
Vol 25 (1) ◽  
pp. 125-131 ◽  
Author(s):  
S. Kawahito ◽  
M. Kameyama ◽  
T. Higuchi
Keyword(s):  
High Performance ◽  
Arithmetic Circuits

Mixed Full Adder topologies for high-performance low-power arithmetic circuits

2007 ◽  
Vol 38 (1) ◽  
pp. 130-139 ◽  
Author(s):  
M. Alioto ◽  
G. Di Cataldo ◽  
G. Palumbo
Keyword(s):  
Low Power ◽  
High Performance ◽  
Full Adder ◽  
Arithmetic Circuits

Educational design of high-performance arithmetic circuits on FPGA

1999 ◽  
Vol 42 (4 [+CDROM]) ◽  
pp. 27 pp. ◽  
Author(s):  
G. Cappuccino ◽  
G. Cocorullo ◽  
P. Corsonello ◽  
S. Perri
Keyword(s):  
High Performance ◽  
Arithmetic Circuits ◽  
Educational Design

A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits

2019 ◽  
Vol 66 (1) ◽  
pp. 313-326 ◽  
Author(s):  
Honglan Jiang ◽  
Leibo Liu ◽  
Pieter P. Jonker ◽  
Duncan G. Elliott ◽  
Fabrizio Lombardi ◽  
...  
Keyword(s):  
Adaptive Filter ◽  
Energy Efficient ◽  
High Performance ◽  
Arithmetic Circuits ◽  
Distributed Arithmetic

Low Power and High Performance Arithmetic Circuits in Feedthrough CMOS Logic Family for Low Power Applications

2006 ◽  
Vol 2 (2) ◽  
pp. 300-307 ◽  
Author(s):  
Victor Navarro-Botello ◽  
Juan A. Montiel-Nelson ◽  
Saeid Nooshabadi
Keyword(s):  
Low Power ◽  
High Performance ◽  
Arithmetic Circuits

High performance low power CMOS dynamic logic for arithmetic circuits

2007 ◽  
Vol 38 (4-5) ◽  
pp. 482-488 ◽  
Author(s):  
Victor Navarro-Botello ◽  
Juan A. Montiel-Nelson ◽  
Saeid Nooshabadi
Keyword(s):  
Low Power ◽  
High Performance ◽  
Dynamic Logic ◽  
Arithmetic Circuits ◽  
Low Power Cmos
Sign in / Sign up

Export Citation Format

Share Document