CMOS-compatible planar silicon waveguide-grating-coupler photodetectors fabricated on silicon-on-insulator (SOI) substrates

2002 ◽  
Vol 38 (5) ◽  
pp. 477-480 ◽  
Author(s):  
S.M. Csutak ◽  
S. Dakshina-Murthy ◽  
J.C. Campbell
Keyword(s):  
Silicon On Insulator ◽  
Grating Coupler ◽  
Waveguide Grating ◽  
Silicon Waveguide ◽  
Planar Silicon ◽  
Cmos Compatible ◽  
Soi Substrates

scholarly journals CMOS-compatible high efficiency double-etched apodized waveguide grating coupler

2013 ◽  
Vol 21 (7) ◽  
pp. 7868 ◽  
Author(s):  
Chao Li ◽  
Huijuan Zhang ◽  
Mingbin Yu ◽  
G. Q. Lo
Keyword(s):  
High Efficiency ◽  
Grating Coupler ◽  
Waveguide Grating ◽  
Cmos Compatible

CMOS-compatible high-speed planar silicon photodiodes fabricated on SOI substrates

2002 ◽  
Vol 38 (2) ◽  
pp. 193-196 ◽  
Author(s):  
S.M. Csutak ◽  
J.D. Schaub ◽  
W.E. Wu ◽  
R. Shimer ◽  
J.C. Campbell
Keyword(s):  
High Speed ◽  
Planar Silicon ◽  
Cmos Compatible ◽  
Soi Substrates

Study on angle detection capability of silicon waveguide grating coupler

2018 ◽  
Author(s):  
Yang Gao ◽  
Yanfei Liu ◽  
Jiali Liao ◽  
Jun Xu ◽  
Zhanrong Zhou ◽  
...  
Keyword(s):  
Grating Coupler ◽  
Detection Capability ◽  
Waveguide Grating ◽  
Silicon Waveguide

scholarly journals Silicon waveguide grating coupler based on a segmented grating structure

2018 ◽  
Vol 57 (12) ◽  
pp. 3301 ◽  
Author(s):  
Jianxun Hong ◽  
Feng Qiu ◽  
Andrew M. Spring ◽  
Shiyoshi Yokoyama
Keyword(s):  
Grating Coupler ◽  
Waveguide Grating ◽  
Grating Structure ◽  
Silicon Waveguide ◽  
Segmented Grating

Silicon waveguide grating coupler for perfectly vertical fiber based on a tilted membrane structure

2016 ◽  
Vol 41 (4) ◽  
pp. 820 ◽  
Author(s):  
Liu Liu ◽  
Jianhao Zhang ◽  
Chenzhao Zhang ◽  
Siya Wang ◽  
Chichao Jin ◽  
...  
Keyword(s):  
Membrane Structure ◽  
Grating Coupler ◽  
Waveguide Grating ◽  
Silicon Waveguide

scholarly journals Optimal Design of an Ultrasmall SOI-Based 1 × 8 Flat-Top AWG by Using an MMI

2013 ◽  
Vol 2013 ◽  
pp. 1-6 ◽  
Author(s):  
Hongqiang Li ◽  
Yaoting Bai ◽  
Xiaye Dong ◽  
Enbang Li ◽  
Yang Li ◽  
...  
Keyword(s):  
Insertion Loss ◽  
Spectral Response ◽  
Beam Propagation Method ◽  
Silicon On Insulator ◽  
Optimized Design ◽  
Arrayed Waveguide Grating ◽  
Channel Spacing ◽  
Waveguide Grating ◽  
Passband Width ◽  
Arrayed Waveguide

Four methods based on a multimode interference (MMI) structure are optimally designed to flatten the spectral response of silicon-on-insulator- (SOI-) based arrayed-waveguide grating (AWG) applied in a demodulation integration microsystem. In the design for each method, SOI is selected as the material, the beam propagation method is used, and the performances (including the 3 dB passband width, the crosstalk, and the insertion loss) of the flat-top AWG are studied. Moreover, the output spectrum responses of AWGs with or without a flattened structure are compared. The results show that low insertion loss, crosstalk, and a flat and efficient spectral response are simultaneously achieved for each kind of structure. By comparing the four designs, the design that combines a tapered MMI with tapered input/output waveguides, which has not been previously reported, was shown to yield better results than others. The optimized design reduced crosstalk to approximately −21.9 dB and had an insertion loss of −4.36 dB and a 3 dB passband width, that is, approximately 65% of the channel spacing.

Engineering silicon-on-insulator (SOI) substrates for hybrid orientation technologies (HOT)

2009 ◽  
Author(s):  
T. Signamarcheix ◽  
B. Biasse ◽  
A-M. Papon ◽  
E. Nolot ◽  
B. Ghyselen ◽  
...  
Keyword(s):  
Silicon On Insulator ◽  
Soi Substrates

Compact efficient broadband grating coupler for silicon-on-insulator waveguides

2004 ◽  
Vol 29 (23) ◽  
pp. 2749 ◽  
Author(s):  
Dirk Taillaert ◽  
Peter Bienstman ◽  
Roel Baets
Keyword(s):  
Silicon On Insulator ◽  
Grating Coupler

Semi-Insulating Silicon for Microwave Devices

2009 ◽  
Vol 156-158 ◽  
pp. 101-106 ◽  
Author(s):  
Douglas M. Jordan ◽  
Kanad Mallik ◽  
Robert J. Falster ◽  
Peter R. Wilshaw
Keyword(s):  
Room Temperature ◽  
Energy Levels ◽  
Silicon On Insulator ◽  
Microwave Devices ◽  
Insulating Material ◽  
Czochralski Silicon ◽  
Boron Doped ◽  
Microwave Applications ◽  
Soi Substrates ◽  
Phosphorus Doped

The concept of fully encapsulated, semi-insulating silicon (SI-Si), Czochralski-silicon-on-insulator (CZ-SOI) substrates for silicon microwave devices is presented. Experimental results show that, using gold as a compensating impurity, a Si resistivity of order 400 kΩcm can be achieved at room temperature using lightly phosphorus doped substrates. This compares favourably with the maximum of ~180kΩcm previously achieved using lightly boron doped wafers and is due to a small asymmetry of the position of the two gold energy levels introduced into the band gap. Measurements of the temperature dependence of the resistivity of the semi-insulating material show that a resistivity ~5kΩcm can be achieved at 100°C. Thus the substrates are suitable for microwave devices working at normal operating temperatures and should allow Si to be used for much higher frequency microwave applications than currently possible.

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