Asymmetrical duty cycle permits zero switching loss in PWM circuits with no conduction loss penalty

1993 ◽  
Vol 29 (1) ◽  
pp. 121-125 ◽  
Author(s):  
P. Imbertson ◽  
N. Mohan
Keyword(s):  
Duty Cycle ◽  
Switching Loss ◽  
Conduction Loss

scholarly journals Performance Analysis of Trench Power MOSFETs in High-Frequency Synchronous Buck Converter Applications

2008 ◽  
Vol 2008 ◽  
pp. 1-9 ◽  
Author(s):  
Yali Xiong ◽  
Xu Cheng ◽  
Xiangcheng Wang ◽  
Pavan Kumar ◽  
Lina Guo ◽  
...  
Keyword(s):  
Figure Of Merit ◽  
Buck Converter ◽  
Switching Frequency ◽  
Circuit Modeling ◽  
Buck Converters ◽  
Switching Loss ◽  
Frequency Range ◽  
Power Mosfets ◽  
Conduction Loss ◽  
Obvious Benefit

This paper investigates the performance perspectives and theoretical limitations of trench power MOSFETs in synchronous rectifier buck converters operating in the MHz frequency range. Several trench MOSFET technologies are studied using a mixed-mode device/circuit modeling approach. Individual power loss contributions from the control and synchronous MOSFETs, and their dependence on switching frequency between 500 kHz and 5 MHz are discussed in detail. It is observed that the conduction loss contribution decreases from 40% to 4% while the switching loss contribution increases from 60% to 96% as the switching frequency increases from 500 KHz to 5 MHz. Beyond 1 MHz frequency there is no obvious benefit to increase the die size of either SyncFET or CtrlFET. The RDS(ON)×QG figure of merit (FOM) still correlates well to the overall converter efficiency in the MHz frequency range. The efficiency of the hard switching buck topology is limited to 80% at 2 MHz and 65% at 5 MHz even with the most advanced trench MOSFET technologies.

scholarly journals Analysis, Design, and Implementation of Improved LLC Resonant Transformer for Efficiency Enhancement

Energies ◽  
2018 ◽  
Vol 11 (12) ◽  
pp. 3288 ◽  
Author(s):  
Zhenxing Zhao ◽  
Qianming Xu ◽  
Yuxing Dai ◽  
Hanhang Yin
Keyword(s):  
Output Voltage ◽  
Efficiency Enhancement ◽  
Switching Loss ◽  
Conduction Loss ◽  
Wide Range ◽  
Llc Resonant Converter ◽  
Transformer Design ◽  
Analysis Design ◽  
Gain Adjustment ◽  
Secondary Winding

In battery charging applications, the charger changes its output voltage in a wide range during the charging process. This makes the design of LLC converters difficult to be optimized between the efficiency and the gain range. In this paper, an improved resonant transformer is presented for LLC resonant converter charger to improve the gain adjustment and charger efficiency. The resonant inductance and magnetizing inductance are integrated in the designed LLC transformer, and the magnetizing inductance can be adjusted dynamically with the change of output voltage and load, which is realized by a switch-controlled inductor (SCI) parallel to the secondary winding of transformer. The proposed transformer has 22.4% reduction in losses under full load conditions compared to conventional solutions. Moreover, the conduction loss and switching loss of LLC resonant tank are reduced by dynamically adjusting the magnetizing inductance, which improves the comprehensive efficiency of the whole charging process. The proposed transformer design is verified on a 720 W prototype.

scholarly journals Comparative Assessment of Gate Drive Control Schemes in High Frequency Converter

2011 ◽  
Vol 1 (4) ◽  
pp. 76-83 ◽  
Author(s):  
N. Z. Yahaya ◽  
K. M. Begam ◽  
M. Awan
Keyword(s):  
High Frequency ◽  
Frequency Converter ◽  
Buck Converter ◽  
Duty Ratio ◽  
Gate Delay ◽  
Switching Loss ◽  
Conduction Loss ◽  
Drive Control ◽  
Control Schemes ◽  
High Level

Several gate drive control schemes are simulated and the results show that the Fixed Duty ratio (FDR) can help drive synchronous rectifier buck converter (SRBC) correctly with low dead time and hence reduce body diode conduction loss. Even though FDR is prone to cross-conduction effects, the design is simple. Apart from that, Adaptive Gate Delay (AGD) and Predictive Gate Delay (PGD) control schemes have also shown high level of efficiency. However, AGD generates more losses. Even though the total switching loss in PGD has not improved much of only 1 %, more than 82 % efficiency has been achieved in spite of the advantage in FDR and AGD schemes.

1.2-kV SiC Trench-Etched Double-Diffused MOS (TED-MOS)

2019 ◽  
Vol 963 ◽  
pp. 617-620 ◽  
Author(s):  
Takeru Suto ◽  
Naoki Watanabe ◽  
Yuan Bu ◽  
Hiroshi Miki ◽  
Naoki Tega ◽  
...  
Keyword(s):  
Electric Field ◽  
Dielectric Breakdown ◽  
Device Simulation ◽  
Gate Insulator ◽  
Gate Leakage Current ◽  
Switching Loss ◽  
Conduction Loss ◽  
Small Loss ◽  
Novel Structure ◽  
Steep Decline

A novel structure, trench-eched double-diffused MOS (TED-MOS), were proposed. In this study, we demonstrate compatibility of reliability and small loss for applications to electric vehicle. To suppress the dielectric breakdown of gate insulator, a field relaxation layer (FRL) are formed above JFET region. Device simulation shows an effective decrease of electric field on gate dioxide, and furthure improvement of switching-and conduction-loss were expected. The fabricated TED-MOS chip doesn’t show gate leakage current even over 1600 V. We confirmed stable normally-off characteristic of the chip at 175 °C, and its Ron was 66 mΩ under Vg = 20 V and 175 °C condition. As an uniqueness to FRL TED-MOS, capacitance shows a steep decline with several step, which may attributed to depletion between FRL and p-Body and should contributed to the reduction of switching loss.

Comparative Study of Developed 1200V/50A Full SiC IEMOS and VMOS Power Module

2019 ◽  
Vol 963 ◽  
pp. 851-854
Author(s):  
Kei Hayashi ◽  
Tsuyoshi Funaki ◽  
Hisato Michikoshi ◽  
Kenji Fukuda
Keyword(s):  
Comparative Study ◽  
Bridge Circuit ◽  
Switching Loss ◽  
Power Module ◽  
Conduction Loss ◽  
Trench Structure

This study developed two types full SiC half bridge power module, which consist of IEMOS (Implantation Epitaxial MOSFET / Planer structure) or VMOS (V-groove trench MOSFET / Trench structure). The switching loss and conduction loss of the power module are evaluated in H bridge circuit. The VMOS module experimentally shows less loss than IEMOS module.

scholarly journals An Improved Voltage Clamp Circuit Suitable for Accurate Measurement of the Conduction Loss of Power Electronic Devices

Sensors ◽  
2021 ◽  
Vol 21 (13) ◽  
pp. 4285
Author(s):  
Qiuping Yu ◽  
Zhibin Zhao ◽  
Peng Sun ◽  
Bin Zhao ◽  
Yumeng Cai
Keyword(s):  
Voltage Clamp ◽  
Electronic Devices ◽  
High Capacity ◽  
Design Guidelines ◽  
Power Electronic ◽  
Switching Loss ◽  
Conduction Loss ◽  
Component Selection ◽  
Essential Components ◽  
Source Voltage

Power electronic devices are essential components of high-capacity industrial converters. Accurate assessment of their power loss, including switching loss and conduction loss, is essential to improving electrothermal stability. To accurately calculate the conduction loss, a drain–source voltage clamp circuit is required to measure the on-state voltage. In this paper, the conventional drain–source voltage clamp circuit based on a transistor is comprehensively investigated by theoretical analysis, simulations, and experiments. It is demonstrated that the anti-parallel diodes and the gate-shunt capacitance of the conventional drain–source voltage clamp circuit have adverse impacts on the accuracy and security of the conduction loss measurement. Based on the above analysis, an improved drain–source voltage clamp circuit, derived from the conventional drain–source voltage clamp circuit, is proposed to solve the above problems. The operational advantages, physical structure, and design guidelines of the improved circuit are fully presented. In addition, to evaluate the influence of component parameters on circuit performance, this article comprehensively extracts three electrical quantities as judgment indicators. Based on the working mechanism of the improved circuit and the indicators mentioned above, general mathematical analysis and derivation are carried out to give guidelines for component selection. Finally, extensive experiments and detailed analyses are presented to validate the effectiveness of the proposed drain–source voltage clamp circuit. Compared with the conventional drain–source voltage clamp circuit, the improved drain–source voltage clamp circuit has higher measurement accuracy and working security when measuring conduction loss, and the proposed component selection method is verified to be reasonable and effective for better utilizing the clamp circuit.

scholarly journals A Novel Single-Switch High Step-Up DC–DC Converter with Three-Winding Coupled Inductor

Energies ◽  
2021 ◽  
Vol 14 (19) ◽  
pp. 6288
Author(s):  
Aline V. C. Pereira ◽  
Marcelo C. Cavalcanti ◽  
Gustavo M. Azevedo ◽  
Fabrício Bradaschia ◽  
Rafael C. Neto ◽  
...  
Keyword(s):  
Magnetic Coupling ◽  
Switching Loss ◽  
Current Switching ◽  
Conduction Loss ◽  
High Voltage Gain ◽  
Zero Current Switching ◽  
Zero Current ◽  
Voltage Stress ◽  
Photovoltaic Applications ◽  
Coupling Techniques

This paper introduces a single-switch, high step-up DC–DC converter for photovoltaic applications such as power optimizers and microinverters. The proposed converter employs two voltage multipliers cells with switched capacitor and magnetic coupling techniques to achieve high voltage gain. This feature, along with a passive clamp circuit, reduces the voltage stress across the switch, allowing for the employment of low RDSon MOSFET. This leads to low conduction loss of the switch. The diodes operate with zero-current switching at their turn-off transition, eliminating the reverse recovery losses. Additionally, the switch turns on with zero-current switching, leading to insignificant switching loss associated with its turn-on transition. The operation principle and steady-state analysis are presented and validated through experimental results obtained from a 140 W prototype of the proposed converter.

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