Directory-based cache coherence in large-scale multiprocessors

D. Chaiken; C. Fields; K. Kurihara; A. Agarwal

doi:10.1109/2.55500

Directory-based cache coherence in large-scale multiprocessors

Computer ◽

10.1109/2.55500 ◽

1990 ◽

Vol 23 (6) ◽

pp. 49-58 ◽

Cited By ~ 140

Author(s):

D. Chaiken ◽

C. Fields ◽

K. Kurihara ◽

A. Agarwal

Keyword(s):

Large Scale ◽

Cache Coherence

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Software Cache Coherence for Large Scale Multiprocessors

10.21236/ada281628 ◽

1994 ◽

Cited By ~ 1

Author(s):

Leonidas I. Kontothanassis ◽

Michael L. Scott

Keyword(s):

Large Scale ◽

Cache Coherence ◽

Software Cache

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Hardware and compiler-directed cache coherence in large-scale multiprocessors: Design considerations and performance study

IEEE Transactions on Parallel and Distributed Systems ◽

10.1109/71.850834 ◽

2000 ◽

Vol 11 (4) ◽

pp. 375-394 ◽

Cited By ~ 1

Author(s):

L. Choi ◽

Pen-Chung Yew

Keyword(s):

Large Scale ◽

Cache Coherence ◽

Performance Study ◽

Design Considerations ◽

And Performance

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Compiler and hardware support for cache coherence in large-scale multiprocessors

Proceedings of the 23rd annual international symposium on Computer architecture - ISCA '96 ◽

10.1145/232973.233002 ◽

1996 ◽

Cited By ~ 9

Author(s):

Lynn Choi ◽

Pen-Chung Yew

Keyword(s):

Large Scale ◽

Cache Coherence ◽

Hardware Support

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Compiler and hardware support for cache coherence in large-scale multiprocessors

ACM SIGARCH Computer Architecture News ◽

10.1145/232974.233002 ◽

1996 ◽

Vol 24 (2) ◽

pp. 283-294 ◽

Cited By ~ 1

Author(s):

Lynn Choi ◽

Pen-Chung Yew

Keyword(s):

Large Scale ◽

Cache Coherence ◽

Hardware Support

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Towards hierarchical cluster based cache coherence for large-scale network-on-chip

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938037 ◽

2009 ◽

Cited By ~ 4

Author(s):

Yuang Zhang ◽

Zhonghai Lu ◽

Axel Jantsch ◽

Li Li ◽

Minglun Gao

Keyword(s):

Large Scale ◽

Cache Coherence ◽

Hierarchical Cluster ◽

Network On Chip ◽

Large Scale Network ◽

Scale Network ◽

On Chip

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Cache coherence for large scale shared memory multiprocessors

Proceedings of the second annual ACM symposium on Parallel algorithms and architectures - SPAA '90 ◽

10.1145/97444.97681 ◽

1990 ◽

Cited By ~ 2

Author(s):

M. Thapar ◽

B. Delagi

Keyword(s):

Shared Memory ◽

Large Scale ◽

Cache Coherence ◽

Shared Memory Multiprocessors

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Design of an adaptive cache coherence protocol for large scale multiprocessors

IEEE Transactions on Parallel and Distributed Systems ◽

10.1109/71.139202 ◽

1992 ◽

Vol 3 (3) ◽

pp. 281-293 ◽

Cited By ~ 25

Author(s):

Q. Yang ◽

G. Thangadurai ◽

L.N. Bhuyan

Keyword(s):

Large Scale ◽

Cache Coherence ◽

Cache Coherence Protocol ◽

Adaptive Cache

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The Scalable Tree Protocol-a cache coherence approach for large-scale multiprocessors

[1992] Proceedings of the Fourth IEEE Symposium on Parallel and Distributed Processing ◽

10.1109/spdp.1992.242703 ◽

2003 ◽

Cited By ~ 22

Author(s):

H. Nilsson ◽

P. Stenstrom

Keyword(s):

Large Scale ◽

Cache Coherence

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Cache coherence for large scale shared memory multiprocessors

ACM SIGARCH Computer Architecture News ◽

10.1145/121956.121969 ◽

1991 ◽

Vol 19 (1) ◽

pp. 114-119 ◽

Cited By ~ 2

Author(s):

Manu Thapar ◽

Bruce Delagi

Keyword(s):

Shared Memory ◽

Large Scale ◽

Cache Coherence ◽

Shared Memory Multiprocessors

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Snooping based cache coherence via a reservation based WDMA protocol for large‐scale OIDSM multiprocessors

Journal of the Chinese Institute of Engineers ◽

10.1080/02533839.1995.9677726 ◽

1995 ◽

Vol 18 (5) ◽

pp. 597-613 ◽

Cited By ~ 1

Author(s):

I‐Shyan Hwang

Keyword(s):

Large Scale ◽

Cache Coherence

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