Soft-error characteristics in bipolar memory cells with small critical charge

1991 ◽  
Vol 38 (11) ◽  
pp. 2465-2471 ◽  
Author(s):  
Y. Idei ◽  
N. Homma ◽  
H. Nambu ◽  
Y. Sakurai
Keyword(s):  
Soft Error ◽  
Memory Cells ◽  
Critical Charge ◽  
Error Characteristics ◽  
Bipolar Memory

An Analytical Model for Soft Error Critical Charge of Nanometric SRAMs

2009 ◽  
Vol 17 (9) ◽  
pp. 1187-1195 ◽  
Author(s):  
S.M. Jahinuzzaman ◽  
M. Sharifkhani ◽  
M. Sachdev
Keyword(s):  
Analytical Model ◽  
Soft Error ◽  
Critical Charge

A circuit concept for reducing soft error in high-speed memory cells

10.1109/4.279 ◽  
1988 ◽  
Vol 23 (1) ◽  
pp. 201-203 ◽  
Author(s):  
D.D. Tang ◽  
C.-T. Chuang
Keyword(s):  
High Speed ◽  
Soft Error ◽  
Memory Cells

Low-leakage soft error tolerant port-less configuration memory cells for FPGAs

Integration ◽  
2013 ◽  
Vol 46 (4) ◽  
pp. 413-426 ◽  
Author(s):  
Arash Azizi Mazreah ◽  
Mohammad T. Manzuri Shalmani
Keyword(s):  
Soft Error ◽  
Memory Cells ◽  
Low Leakage

scholarly journals Bias Temperature Instability Aware and Soft Error Tolerant Radiation Hardened 10T SRAM Cell

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 256 ◽  
Author(s):  
Ambika Prasad Shah ◽  
Michael Waltl
Keyword(s):  
Soft Error ◽  
Critical Charge ◽  
Bias Temperature Instability ◽  
Noise Margin ◽  
Sram Cell ◽  
Radiation Hardened ◽  
The Stability ◽  
A Charge ◽  
The Impact ◽  
Static Noise

In this paper, we propose an asymmetric radiation-hardened 10T (AS10T) SRAM cell and analyze the impact of bias temperature instabilities (BTI) on the single event upset of the modified structure. For this, we make use of a read decoupled circuit to improve the stability of the reading cycle, and a charge booster circuit to increase the critical charge at the sensitive node of the SRAM cell. First, we compare the noise margin of several reference cells and can clearly observe that the read static noise margin (RSNM) of AS10T is 3.25× higher than as can be achieved for the 6T SRAM cell. This improvement is due to the read decoupled path used for the read operation. To analyze the soft-error hardening, we calculate the critical charge and observe that the critical charge of the proposed AS10T cell exceed the same parameter of other SRAM cells. Further, we perform critical charge simulations and stability analysis considering BTI and observe that the AS10T SRAM cell is also less affected by BTI as the reference cells.

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