The leakage currents of amorphous silicon thin-film transistors: injection currents, back channel currents and stress effects

2000 ◽  
Vol 47 (12) ◽  
pp. 2404-2409 ◽  
Author(s):  
R.A. Street ◽  
F. Lemmi
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Silicon Thin Film ◽  
Leakage Currents ◽  
Stress Effects ◽  
Injection Currents ◽  
Channel Currents

Transient and stress effects in amorphous silicon thin-film transistors

1994 ◽  
Vol 69 (2) ◽  
pp. 327-334 ◽  
Author(s):  
M. Hack ◽  
R. Weisfield ◽  
H. Steemers ◽  
M. J. Thompson ◽  
M. F. Willums ◽  
...  
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Silicon Thin Film ◽  
Stress Effects

Mechanical bending effect on the photo leakage currents characteristic of amorphous silicon thin film transistors

2010 ◽  
Vol 54 (11) ◽  
pp. 1485-1487 ◽  
Author(s):  
M.C. Wang ◽  
S.W. Tsao ◽  
T.C. Chang ◽  
Y.P. Lin ◽  
Po-Tsun Liu ◽  
...  
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Silicon Thin Film ◽  
Leakage Currents ◽  
Bending Effect ◽  
Mechanical Bending

Transient Leakage Currents in Amorphous Silicon Thin-Film Transistors

1992 ◽  
Vol 258 ◽  
Author(s):  
M. Hack ◽  
H. Steemers ◽  
R. Weisfield
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Surface States ◽  
Operating Conditions ◽  
Silicon Thin Film ◽  
Leakage Currents ◽  
Transient Behaviour ◽  
Silicon Interface ◽  
Good Agreement

ABSTRACTIn this paper we present both experimental data and computer simulations of the leakage characteristics of amorphous silicon (a-Si) thin film transistors operated under time transient conditions. The transient behaviour of these devices for realistic operating conditions is often very different from their steady-state characteristics, due to the slow response of deep traps in a-Si. Our model is in good agreement with the data and realistically accounts for the time-dependent behaviour of amorphous silicon with leakage being mainly determined by a combination of fixed charge in the passivation dielectric and a distribution of surface states at the top silicon interface. We show how voltage pulses applied to the gate of a TFT affect its performance as a pixel switch in a two-dimensional array. In particular we concentrate on the effects of light and bias stressing.

The Instability Characteristics of Amorphous Silicon Thin Film Transistors with Various Interfacial and Bulk Defect States

1997 ◽  
Vol 36 (Part 1, No. 10) ◽  
pp. 6226-6229 ◽  
Author(s):  
Huang-Chung Cheng ◽  
Jun-Wei Tsai ◽  
Chun-Yao Huang ◽  
Fang-Chen Luo ◽  
Hsing-Chien Tuan
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Defect States ◽  
Silicon Thin Film

Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

1996 ◽  
Vol 424 ◽  
Author(s):  
R. E. I. Schropp ◽  
K. F. Feenstra ◽  
C. H. M. Van Der Werf ◽  
J. Holleman ◽  
H. Meiling
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Current Crowding ◽  
Hot Wire ◽  
Saturation Regime ◽  
Silicon Thin Film ◽  
Order Of Magnitude

AbstractWe present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

Low frequency noise in amorphous silicon thin film transistors with SiNx gate dielectric

2009 ◽  
Vol 105 (12) ◽  
pp. 124504 ◽  
Author(s):  
S. L. Rumyantsev ◽  
Sung Hun Jin ◽  
M. S. Shur ◽  
Mun-Soo Park
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Low Frequency ◽  
Frequency Noise ◽  
Low Frequency Noise ◽  
Silicon Thin Film
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