Process limitation and device design tradeoffs of self-aligned TiSi/sub 2/ junction formation in submicrometer CMOS devices
1991 ◽
Vol 38
(2)
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pp. 246-254
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2002 ◽
Vol 389-393
◽
pp. 1531-1534
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1982 ◽
Vol 43
(9)
◽
pp. 1353-1358
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