An analytical method of evaluating variation of the threshold voltage shift caused by the negative-bias temperature stress in poly-Si TFTs

1998 ◽  
Vol 45 (1) ◽  
pp. 165-172 ◽  
Author(s):  
S. Maeda ◽  
S. Maegawa ◽  
T. Ipposhi ◽  
H. Kuriyama ◽  
M. Ashida ◽  
...  
Keyword(s):  
Temperature Stress ◽  
Threshold Voltage ◽  
Analytical Method ◽  
Negative Bias ◽  
Threshold Voltage Shift ◽  
Voltage Shift ◽  
Bias Temperature Stress

Characterization of Threshold Voltage Shift by Negative Bias Temperature Stress in HfSiOx Films

2019 ◽  
Vol 19 (2) ◽  
pp. 393-402
Author(s):  
Chihiro Tamura ◽  
Tomohiro Hayashi ◽  
Yuuki Kikuchi ◽  
Kenji Ohmori ◽  
Ryu Hasunuma ◽  
...  
Keyword(s):  
Temperature Stress ◽  
Threshold Voltage ◽  
Negative Bias ◽  
Threshold Voltage Shift ◽  
Voltage Shift ◽  
Bias Temperature Stress

1700V, 5.5mOhm-cm2 4H-SiC DMOSFET with Stable 225°C Operation

2014 ◽  
Vol 778-780 ◽  
pp. 903-906 ◽  
Author(s):  
Kevin Matocha ◽  
Kiran Chatty ◽  
Sujit Banerjee ◽  
Larry B. Rowland
Keyword(s):  
High Temperature ◽  
Temperature Stress ◽  
High Temperatures ◽  
Threshold Voltage ◽  
Room Temperature ◽  
Gate Bias ◽  
Threshold Voltage Shift ◽  
Device Reliability ◽  
Bias Temperature Stress ◽  
High Temperature Operation

We report a 1700V, 5.5mΩ-cm24H-SiC DMOSFET capable of 225°C operation. The specific on-resistance of the DMOSFET designed for 1200V applications is 8.8mΩ-cm2at 225°C, an increase of only 60% compared to the room temperature value. The low specific on-resistance at high temperatures enables a smaller die size for high temperature operation. Under a negative gate bias temperature stress (BTS) at VGS=-15 V at 225°C for 20 minutes, the devices show a threshold voltage shift of ΔVTH=-0.25 V demonstrating one of the key device reliability requirements for high temperature operation.

COMPARATIVE INSTABILITIES ANALYSIS FOR a-Si:H BODY-TIED TFT (BT-TFT) AND FLOATING BODY TFT (FB-TFT) UNDER BIAS TEMPERATURE STRESSING (BTS)

2008 ◽  
Vol 22 (05) ◽  
pp. 337-341
Author(s):  
YONG K. LEE ◽  
SUNG-HOON CHOA
Keyword(s):  
Silicon Nitride ◽  
Threshold Voltage ◽  
Gate Insulator ◽  
Floating Body ◽  
Negative Bias ◽  
Positive Bias ◽  
Threshold Voltage Shift ◽  
Voltage Shift ◽  
Bias Stress ◽  
Hole Trapping

The a- Si:H thin film transistors TFT with silicon nitride as a gate insulator have been stressed with negative and positive bias to realize the instability mechanisms. With proposed BT-TFT and FB-TFT devices, it is found that the threshold voltages of both BT-TFT and BT-TFT devices are positively shifted under positive bias stress and then negatively shifted for negative bias stress. The positive threshold voltage shift is due to the electron trapping in the silicon nitride or at the a- Si:H /silicon nitride interface. The negative threshold voltage shift is mainly due to hole trapping and/or electron de-trapping in the silicon nitride or at the a- Si:H /silicon nitride interface. The positive or negative threshold voltage shift keeps increasing with increasing positive or negative gate bias for both BT-TFT and FB-TFT devices. However, as far as the threshold voltage shift slope is concerned, under positive bias stress, both BT-TFT and FB-TFT devices are similar to each other. On the other hand, under negative bias stress, BT-TFT shift amount is much less than one for the FB-TFT device.

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