A study of hydrogen passivation of grain boundaries in polysilicon thin-film transistors

1989 ◽  
Vol 36 (1) ◽  
pp. 101-107 ◽  
Author(s):  
B. Faughnan ◽  
A.C. Ipri
1993 ◽  
Vol 32 (Part 1, No. 6A) ◽  
pp. 2601-2606 ◽  
Author(s):  
Kris Baert ◽  
Hiroyuki Murai ◽  
Kazuhiro Kobayashi ◽  
Hirofumi Namizaki ◽  
Masahiro Nunoshita

2009 ◽  
Vol 21 (20) ◽  
pp. 4949-4954 ◽  
Author(s):  
R. T. Weitz ◽  
K. Amsharov ◽  
U. Zschieschang ◽  
M. Burghard ◽  
M. Jansen ◽  
...  

Author(s):  
Kwon-Young Choi ◽  
Juhn-Suk Yoo ◽  
Hong-seok Choi ◽  
Min-Koo Han ◽  
Yong-Sang Kim ◽  
...  

2001 ◽  
Vol 665 ◽  
Author(s):  
J. H. Schön ◽  
L. D. Buchholz ◽  
Ch. Kloc ◽  
B. Batlogg

ABSTRACTThe charge transport properties in polycrystalline pentacene thin film transistors is investigated. A potential barrier is formed at grain boundaries due charged trapping states. The influence of such grain boundaries on the hole mobility of the devices is analyzed for different grain sizes, trap concentrations, and carrier densities. The results reveal that room temperature mobilities exceeding 0.5 cm2/Vs can be obtained in thin films with large grains as well as in nanocrystalline material. Consequently, single crystal device limits can be reached also by polycrystalline pentacene thin film transistors.


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