scholarly journals Impurity conduction in phosphorus-doped buried-channel silicon-on-insulator field-effect transistors at temperatures between 10 and295K

2006 ◽  
Vol 74 (23) ◽  
Author(s):  
Yukinori Ono ◽  
Jean-Francois Morizur ◽  
Katsuhiko Nishiguchi ◽  
Kei Takashina ◽  
Hiroshi Yamaguchi ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Silicon On Insulator ◽  
Buried Channel ◽  
Impurity Conduction ◽  
Phosphorus Doped

KFM Observation of Electron Charging and Discharging in Phosphorus-Doped SOI Channel

2011 ◽  
Vol 470 ◽  
pp. 33-38
Author(s):  
Miftahul Anwar ◽  
Daniel Moraru ◽  
Yuya Kawai ◽  
Maciej Ligowski ◽  
Takeshi Mizuno ◽  
...  
Keyword(s):  
Low Temperature ◽  
Electric Field ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Silicon On Insulator ◽  
Kelvin Probe ◽  
Force Microscopy ◽  
Phosphorus Doped ◽  
Channel Region ◽  
Electronic Potential

Low temperature Kelvin Probe Force Microscopy (LT-KFM) can be used to monitor the electronic potential of individual dopants under an electric field. This capability is demonstrated for silicon-on-insulator field-effect-transistors (SOI-FETs) with a phosphorus-doped channel. We show results of the detection of individual dopants in Si by LT-KFM. Furthermore, we also observe single-electron charging in individual dopants located in the Si channel region.

Self-Aligned Asymmetric Metal–Oxide–Semiconductor Field Effect Transistors Fabricated on Silicon-on-Insulator

2009 ◽  
Vol 48 (9) ◽  
pp. 091201
Author(s):  
Jong Pil Kim ◽  
Jae Young Song ◽  
Sang Wan Kim ◽  
Jae Hyun Park ◽  
Woo Young Choi ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Silicon On Insulator ◽  
Oxide Semiconductor

Inverter design with positive feedback field-effect transistors

2021 ◽  
Author(s):  
Changhoon Lee ◽  
Changwoo Han ◽  
Changhwan Shin
Keyword(s):  
Positive Feedback ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Feedback Mechanism ◽  
Silicon On Insulator ◽  
Logic Device ◽  
Device Applications ◽  
Positive Feedback Mechanism ◽  
Switching Devices

Abstract As the physical size of semiconductor devices continues to be aggressively scaled down, feedback field-effect transistors (FBFET) with a positive feedback mechanism among a few promising steep switching devices have received attention as next-generation switching devices. Conventional FBFETs have been studied to explore their device performance. However, this has been restricted to the case of single FBFET; basic circuit designs with FBFETs have not been investigated extensively. In this work, we propose an inverter circuit design with silicon-on-insulator (SOI) FBFETs; we verified this inverter design with mixed-mode technology computer-aided design simulation. The basic principles and mechanisms for designing FBFET inverter circuits are explained because their configuration is different from conventional inverters. In addition, the device parameters necessary to optimize circuit construction are introduced for logic device applications.

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