Multi-layer stackable polymer memory devices

Author(s):  
Wei Lek Kwan ◽  
Ricky J. Tseng ◽  
Yang Yang

Multi-layer stackable polymer memory architecture is an interesting new direction for polymer memory. The memory density can be increased by increasing the number of stacked layers without reducing the minimum feature size. To achieve multi-level stacking, the polymer used must be able to be cross-linked so that it will not be dissolved upon deposition of additional layers. This requirement also makes the polymer robust enough to withstand conventional lithographic processes. In this paper, the various approaches to achieve cross-linkable polymer memory are discussed. Device fabrication and performance are also reported.

MRS Bulletin ◽  
1995 ◽  
Vol 20 (11) ◽  
pp. 53-56 ◽  
Author(s):  
Kuniko Kikuta

The scaling of integrated-circuit device dimensions in the horizontal direction has caused an increase in aspect ratios of contact holes and vias without a corresponding scaledown in vertical dimensions. Conventional sputtering has become unreliable for handling higher aspect-ratio via/contact holes because of its poor step coverage. Several studies have attempted to overcome this problem by using W-CVD and reflow technology. The W-CVD is used for practical device fabrications. However, this technique has several problems such as poor adhesion to SiO2, poor W surface morphology, greater resistivity than Al, and the need of an etch-back process.Al reflow technology using a conventional DC magnetron sputtering system can simplify device-fabrication processes and achieve high reliability without Al/W interfaces. In particular, the Al reflow technology is profitable for multi-level interconnections in combination with a damascene process by using Al chemical mechanical polishing (CMP). These interconnections are necessary for miniaturized and high-speed devices because they provide lower resistivity than W and simplify fabrication processes, resulting in lower cost.This article describes recent Al reflow sputtering technologies as well as application of via and interconnect metallization.


Author(s):  
Joshua Grose ◽  
Obehi G. Dibua ◽  
Dipankar Behera ◽  
Chee S. Foong ◽  
Michael Cullinan

Abstract Additive Manufacturing (AM) technologies are often restricted by the minimum feature size of parts they can repeatably build. The microscale selective laser sintering (μ-SLS) process, which is capable of producing single micron resolution parts, addresses this issue directly. However, the unwanted dissipation of heat within the powder bed of a μ-SLS device during laser sintering is a primary source of error that limits the minimum feature size of the producible parts. A particle scale thermal model is needed to characterize the thermal properties of the nanoparticles undergoing sintering and allow for the prediction of heat affected zones (HAZ) and the improvement of final part quality. Thus, this paper presents a method for the determination of the effective thermal conductivity of metal nanoparticle beds in a microscale selective laser sintering process using finite element simulations in ANSYS. CAD models of nanoparticle groups at various timesteps during sintering are developed from Phase Field Modeling (PFM) output data, and steady state thermal simulations are performed on each group. The complete simulation framework developed in this work is adaptable to particle groups of variable sizes and geometric arrangements. Results from the thermal models are used to estimate the thermal conductivity of the copper nanoparticles as a function of sintering duration.


2008 ◽  
Vol 130 (33) ◽  
pp. 11073-11081 ◽  
Author(s):  
Sudip Barman ◽  
Fengjun Deng ◽  
Richard L. McCreery

2015 ◽  
Vol 1729 ◽  
pp. 53-58
Author(s):  
Brian L. Geist ◽  
Dmitri Strukov ◽  
Vladimir Kochergin

ABSTRACTResistive memory materials and devices (often called memristors) are an area of intense research, with metal/metal oxide/metal resistive elements a prominent example of such devices. Electroforming (the formation of a conductive filament in the metal oxide layer) represents one of the often necessary steps of resistive memory device fabrication that results in large and poorly controlled variability in device performance. In this contribution we present a numerical investigation of the electroforming process. In our model, drift and Ficks and Soret diffusion processes are responsible for movement of vacancies in the oxide material. Simulations predict filament formation and qualitatively agreed with a reduction of the forming voltage in structures with a top electrode. The forming and switching results of the study are compared with numerical simulations and show a possible pathway toward more repeatable and controllable resistive memory devices.


2005 ◽  
Vol 868 ◽  
Author(s):  
K. Endo ◽  
P. Badica ◽  
H. Sato ◽  
H. Akoh

AbstractHigh quality thin films of HTS have been grown by MOCVD on substrates with artificial steps of predefined height and width. The surface of the films grown on the steps having width equal to the ‘double of the migration length' of the atomic species depositing on the substrate is totally free of precipitates: precipitates are gathered at the step edges where the free energy is lowest. The method has several advantages: it is simple, universal (it is independent of the materials, substrates, deposition technique or application) and allows control of precipitates segregates so that the quality and growth conditions of the films are the same as for the films grown on conventional substrates. The method is expected to result in new opportunities for the device fabrication, design and performance. As an example we present successful fabrication of a mesa structure showing intrinsic Josephson effect. We have used thin films of Bi-2212/Bi-2223 superstructure grown on (001) SrTiO3 single crystal substrates with artificial steps of 20 μm.


2020 ◽  
Vol 78 ◽  
pp. 101838 ◽  
Author(s):  
Petru L. Curşeu ◽  
Andrei Rusu ◽  
Laurenţiu P. Maricuţoiu ◽  
Delia Vîrgă ◽  
Silvia Măgurean

2007 ◽  
Vol 17 (05) ◽  
pp. 403-421 ◽  
Author(s):  
FREDERIC CHAZAL ◽  
ANDRE LIEUTIER ◽  
JAREK ROSSIGNAC

Consider two (n−1)-dimensional manifolds, S and S′ in ℝn. We say that they are normal-compatible when the closest projection of each one onto the other is a homeomorphism. We give a tight condition under which S and S′ are normal-compatible. It involves the minimum feature size of S and of S′ and the Hausdorff distance between them. Furthermore, when S and S′ are normal-compatible, their Frechet distance is equal to their Hausdorff distance. Our results hold for arbitrary dimension n.


2019 ◽  
Vol 5 (2) ◽  
Author(s):  
He Li-xia ◽  
Hao Xiao-yong ◽  
He Gao-kui

Thallium bromide (TlBr) is a compound semiconductor material, which can be used for X-ray and gamma-ray detectors and can be used at room temperature. It has excellent physical properties, high atomic number and density, wide bandgap (B = 2.68 eV), and low ionization energy. Compared with other X-ray and gamma-ray detection materials, TlBr devices have high detection efficiency and excellent energy resolution performance. So TlBr is suitable for housing in small tubes or shells, and it can be widely used in nuclear material measurement, safeguards verification, national security, space high-energy physics research, and other fields. Based on the fabrication of TlBr prototype detector, this paper focuses on the device fabrication and signal acquisition technology. Gamma-ray spectrum measurements and performance tests are carried out with AM-241 radioactive source. The results show that the special photoelectric peak of 59.5 keV is clearly visible, and the optimal resolution is 4.15 keV (7%).


Sign in / Sign up

Export Citation Format

Share Document