scholarly journals Error bounds on complex floating-point multiplication with an FMA

2016 ◽  
Vol 86 (304) ◽  
pp. 881-898 ◽  
Author(s):  
Claude-Pierre Jeannerod ◽  
Peter Kornerup ◽  
Nicolas Louvet ◽  
Jean-Michel Muller
Keyword(s):  
Error Bounds ◽  
Floating Point ◽  
Point Multiplication

scholarly journals Error bounds on complex floating-point multiplication

2007 ◽  
Vol 76 (259) ◽  
pp. 1469-1482 ◽  
Author(s):  
Richard Brent ◽  
Colin Percival ◽  
Paul Zimmermann
Keyword(s):  
Error Bounds ◽  
Floating Point ◽  
Point Multiplication

scholarly journals NULL Convention Floating Point Multiplier

2015 ◽  
Vol 2015 ◽  
pp. 1-10 ◽  
Author(s):  
Anitha Juliette Albert ◽  
Seshasayanan Ramachandran
Keyword(s):  
High Precision ◽  
Dynamic Range ◽  
Digital Signal ◽  
High Dynamic Range ◽  
Floating Point ◽  
Single Precision ◽  
Critical Part ◽  
Point Multiplication ◽  
Null Convention Logic ◽  
High Dynamic

Floating point multiplication is a critical part in high dynamic range and computational intensive digital signal processing applications which require high precision and low power. This paper presents the design of an IEEE 754 single precision floating point multiplier using asynchronous NULL convention logic paradigm. Rounding has not been implemented to suit high precision applications. The novelty of the research is that it is the first ever NULL convention logic multiplier, designed to perform floating point multiplication. The proposed multiplier offers substantial decrease in power consumption when compared with its synchronous version. Performance attributes of the NULL convention logic floating point multiplier, obtained from Xilinx simulation and Cadence, are compared with its equivalent synchronous implementation.

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